843021AG

www.icst.com/products/hiperclocks.html

REV. C MARCH 31, 2005

7

Integrated

Circuit

Systems, Inc.

ICS843021

Figure 3A shows a schematic example of the ICS843021. An

example of LVEPCL termination is shown in this schematic.

Additional LVPECL termination approaches are shown in the

LVPECL Termination Application Note. In this example, an 18pF

parallel resonant 25MHz crystal is used for generating 125MHz

output frequency. The C1 = 27pF and C2 = 33pF are recom-

mended for frequency accuracy. For different board layout, the

C1 and C2 values may be slightly adjusted for optimizing fre-

quency accuracy.

Figure 3B shows an example of ICS843021 P.C. board layout.

The crystal X1 footprint shown in this example allows installa-

tion of either surface mount HC49S or through-hole HC49 pack-

age.The footprints of other components in this example are listed

in the

Table 6. There should be at least one decoupling capacitor

per power pin. The decoupling capacitors should be located as

close as possible to the power pins. The layout assumes that

the board has clean analog power ground plane.

e

c

n

e

r

e

f

e

Re

z

i

S

2

C

,

1

C2

0

4

0

3

C5

0

8

0

5

C

,

4

C3

0

6

0

2

R3

0

6

0

t

n

e

n

o

p

m

o

c

s

t

s

il

,

6

e

l

b

a

T

:

E

T

O

N

.

e

l

p

m

a

x

e

t

u

o

y

a

l

s

i

h

t

n

i

n

w

o

h

s

s

e

z

i

s

Zo = 50 Ohm

VCC

X1

25MHz

VCC=3.3V

C3

10uF

VCC

C1

27pF

Q

C5

0.1u

R3

133

C2

33pF

VCC

Zo = 50 Ohm

U1

ICS843011

1

2

3

4

8

7

6

5

VCCA

VEE

XTAL_OUT

XTAL_IN

VCC

Q0

nQ0

NC

R4

82.5

C4

0.01u

R5

133

nQ

VCCA

R6

82.5

18pF

R2

10

+

-

ICS843021