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22564B-1—February 2000

AMD-751™ System Controller Revision Guide

Preliminary Information

3

Revision Determination

Table 3 summarizes the AMD-751 system controller configuration register offsets, devices, default

values after reset, and access types. Access types are indicated as follows:

RW - Read/Write

RO - Read Only

This read-only value is defined as 1022h.

This read-only value of 7006h represents the AMD-751 system controller single processor device.

Bits 7–0

AMD-751™ System Controller Revision Code (RO) - The most-significant nibble indicates the die

revision and the least-significant nibble represents the stepping. (For example, 00h = Revision A0; 01h

= Revision A1; 10h = Revision B0; 21h = Revision C1; 25h = Revision C5; etc.)

Table 3.

Function 0, Device 0 Configuration Registers

Offset

Cache Control

Reset

Access

01h–00h

Vendor ID (AMD)

1022h

RO

03h–02h

Device ID Single Processor Device

7006h

RO

08h

Revision ID

nn *

RO

63h–60h

BIU Status and Control

0000_0Cxxh

RW

86h

PCI and APCI Chaining

00h

RW

Note:

*

nn changes for each device revision. For example, 00h = Revision A0; 01h = Revision A1; 10h =

Revision B0; 21h = Revision C1; 25h = Revision C5 etc.

Vendor ID

Device 0

Offset 01h–00h

Bit 15

14

13

12

11

10

9

8

7

654321

Bit 0

Vendor ID

Reset

0001000000100010

Device ID

Device 0

Offset 03h–02h

Bit 15

14

13

12

11

10

9

8

7

654321

Bit 0

Device ID

Reset

0111000000000110

Revision ID

Device 0

Offset 08h

Bit 7

6

5

4

3

2

1

Bit 0

AMD-751 System Controller Chip Revision and Stepping Code

Reset

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