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ADE9153A

Data Sheet

Rev. 0 | Page 22 of 50

CALIBRATION TIME TO REACH ACCURACY (Seconds)

0.600

0.500

0.400

0.300

0.353

0.200

0.250

0.100

150

200

1501:1

1001:1

619:1

Figure 41. Speed of Convergence for Autocalibration (Voltage Channel)

Based on the Potential Divider Ratio

MEASUREMENTS

Current Channel

The ADE9153A has two current channels. Channel A is optimized

for use with a shunt, and Channel B is for use with a current

transformer. The current channel datapaths for Channel A and

Channel B are shown in Figure 42 and Figure 43, respectively.

Current Channel Gain, xIGAIN

The ADE9153A provides current gain calibration registers,

AIGAIN and BIGAIN, with one register for each channel.

The current channel gain varies with xIGAIN, as shown in the

following equation:

Current Channel Gain =











 

xIGAIN

AI GAIN

HPF

REFERENCE

Σ-∆

MODULATOR

IAP

IAN

VIN

SINC4

LPF

4:1

ZERO-CROSSING

DETECTION

PHASE

COMP

HPFDIS

ZX_SRC_SEL

AI_WAV

TOTAL ACTIVE AND

FUNDAMENTAL REACTIVE

POWER CALCULATIONS

CURRENT PEAK

DETECTION

RMS_OC_SRC

ONE

CYCLE

RMS

RMS AND VA

CALCULATIONS

4kSPS

+1V

ANALOG INPUT RANGE

–1V

VIN

+1/AI_PGAGAIN

ANALOG INPUT RANGE

–1/AI_PGAGAIN

PGA

Figure 42. ADE9153A Current Channel A Datapath

BI GAIN

HPF

REFERENCE

Σ-∆

MODULATOR

IBP

VIN

IBN

SINC4

LPF

4:1

ZERO-CROSSING

DETECTION

PHASE

COMP

INTEGRATOR

HPFDIS

INTEN_BI

ZX_SRC_SEL

BI_WAV

CURRENT PEAK

DETECTION

ONE

CYCLE

RMS

RMS_OC_SRC

RMS

CALCULATIONS

4kSPS

+1.9V

ANALOG INPUT RANGE

0.9V

–0.1V

Figure 43. ADE9153A Current Channel B Datapath

AVGAIN

HPF

REFERENCE

Σ-∆

MODULATOR

VAP

VIN

VAN

SINC4

LPF

4:1

VOLTAGE PEAK

DETECTION

AV_WAV

ZERO-CROSSING

DETECTION

PHASE

COMP

HPFDIS

ZX_SRC_SEL

FUNDAMENTAL AND TOTAL

ACTIVE AND REACTIVE

POWER CALCULATIONS

ONE

CYCLE

RMS

RMS_OC_SRC

FUNDAMENTAL AND TOTAL

RMS, VA, THD

CALCULATIONS

4kSPS

VIN

1.3V

ANALOG INPUT RANGE

0.8V

0.3V

Figure 44. ADE9153A Voltage Channel Datapath

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