Applications Information

Supply Bypassing

0.1μF and 0.001μF capacitors in parallel, as close to the

device as possible, with the 0.001μF valued capacitor the

closest to the device. For additional supply bypassing,

place a 10μF tantalum or ceramic capacitor at the point

where power enters the circuit board.

Differential Traces

Output trace characteristics affect the performance of the

MAX9111/MAX9113. Use controlled impedance traces

to match trace impedance to both transmission medium

impedance and the termination resistor. Eliminate reflec-

tions and ensure that noise couples as common mode

by running the differential traces close together. Reduce

skew by matching the electrical length of the traces.

Excessive skew can result in a degradation of magnetic

field cancellation.

Maintain the distance between the differential traces to

avoid discontinuities in differential impedance. Avoid 90°

turns and minimize the number of vias to further prevent

impedance discontinuities.

Cables and Connectors

Transmission media should have a differential characteristic

impedance of about 100Ω. Use cables and connectors

that have matched impedance to minimize impedance

discontinuities.

Avoid the use of unbalanced cables such as ribbon or

simple coaxial cable. Balanced cables such as twisted

pair offer superior signal quality and tend to generate less

EMI due to canceling effects. Balanced cables tend to

pick up noise as common mode, which is rejected by the

LVDS receiver.

Termination

The MAX9111/MAX9113 input differential voltage depends

on the driver current and termination resistance. Refer to

the MAX9110/MAX9112 differential driver data sheet for

this information.

Minimize the distance between the termination resistor

and receiver inputs. Use a single 1% to 2% surface-mount

resistor across the receiver inputs.

Board Layout

For LVDS applications, a four-layer PCB that provides

separate power, ground, LVDS signals, and input signals

is recommended. Isolate the input and LVDS signals from

each other to prevent coupling. For best results, separate

the input and LVDS signal planes with the power and

ground planes.

Typical Operating Circuit

0.001µF

0.1µF

+3.3V

DIN_

MAX9110

MAX9112

MAX9111

MAX9113

OUT_

LVDS

0.001µF

0.1µF

+3.3V

RECEIVER

DRIVER

MAX9111/MAX9113

Single/Dual LVDS Line Receivers with

Ultra-Low Pulse Skew in SOT23

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