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MP7641AS 数据表(PDF) 7 Page - Exar Corporation |
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MP7641AS 数据表(HTML) 7 Page - Exar Corporation |
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7 / 24 page ![]() MP7641 7 Rev. 2.00 ELECTRICAL CHARACTERISTICS TABLE Description Symbol Min Typ Max Min Max Units Conditions DIGITAL TIMING SPECIFICATIONS2, 4 Input Clock Pulse Width tCH, tCL 40 50 ns Data Setup Time tDS 10 10 ns Data Hold Time tDH 15 15 ns CLK to SDO Propagation Delay tPD 40 50 ns DAC Register Load Pulse Width tLD 100 100 ns Reset Pulse Width tRST 50 60 ns Clock Edge to Load Rising Edge tCKLD1 100 100 ns Clock Edge to Load Falling Edge tCKLD2 00 ns Load Falling Edge to SDO tHZ1 50 60 ns 3-state Enable Load Rising Edge to SDO tHZ2 35 50 ns 3-state Disable Load Falling Edge to CLK Disable tLDCK1 25 40 ns Load Rising Edge to CLK Enable tLDCK2 35 50 ns LD Set-up Time with Respect tLDSU 15 20 ns to CLK NOTES 1 Full Scale Range (FSR) is 3V. 2 Guaranteed but not production tested. 3 Digital input levels should not go below ground or exceed the positive supply voltage, otherwise damage may occur. 4 See Figures 2 and 3. 5 For reference input pulse: tR = tF > 100 ns. 25 °C Tmin to Tmax Specifications are subject to change without notice ABSOLUTE MAXIMUM RATINGS (TA = +25 °C unless otherwise noted)1,2 VCC to AGND +6.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VEE to AGND –6.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC to DGND +13.0 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VEE to DGND –6.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VRi to AGND VCC to VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VOi to AGND VCC to VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Input & Output Voltage to DGND –0.5 to VDD +0.5 V Operating Temperature Range Extended Industrial –40 °C to +85°C . . . . . . . . . . . . . . . . . . . Maximum Junction Temperature –65 °C to 150°C . . . . . . . . . Storage Temperature 150 °C . . . . . . . . . . . . . . . . . . . . . . . . . . Lead Temperature (Soldering, 10 sec) +300 °C . . . . . . . . . . . Package Power Dissipation Rating @ 75 °C PDIP, SOIC 1000mW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Derates above 75 °C 6mW/ °C . . . . . . . . . . . . . . . . . . . . . . NOTES: 1 Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 2 Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps (HP5082-2835) from input pin to the supplies. All inputs have protection diodes which will protect the device from short transients outside the supplies of less than 100mA for less than 100 µs. APPLICATIONS INFORMATION Refer to Section 8 for Applications Information |
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