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MPC8347ECVRADDB 数据表(PDF) 39 Page - NXP Semiconductors |
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MPC8347ECVRADDB 数据表(HTML) 39 Page - NXP Semiconductors |
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39 / 99 page  MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12 Freescale Semiconductor 39 Local Bus Figure 21 through Figure 26 show the local bus signals. Figure 21. Local Bus Signals, Nonspecial Signals Only (DLL Enabled) Figure 22. Local Bus Signals, Nonspecial Signals Only (DLL Bypass Mode) Output Signals: LA[27:31]/LBCTL/LBCKE/LOE LSDA10/LSDWE/LSDRAS/ LSDCAS/LSDDQM[0:3] tLBKHOV tLBKHOV tLBKHOV LSYNC_IN Input Signals: LAD[0:31]/LDP[0:3] Output (Data) Signals: LAD[0:31]/LDP[0:3] Output (Address) Signal: LAD[0:31] LALE tLBIXKH tLBIVKH tLBIXKH tLBKHOX tLBKHOZ tLBKHLR tLBOTOT tLBKHOZ tLBKHOX Output Signals: LSDA10/LSDWE/LSDRAS/ LSDCAS/LSDDQM[0:3] LCLK[n] Input Signals: LAD[0:31]/LDP[0:3] Output Signals: LAD[0:31]/LDP[0:3] LALE Input Signal: LGTA tLBIXKH tLBKLOV tLBKHOZ tLBOTOT tLBIVKH tLBIXKH tLBKLOV tLBKLOV tLBIVKH LA[27:31]/LBCTL/LBCKE/LOE |
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