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ADP2387ACPZN-R7 数据表(PDF) 13 Page - Analog Devices |
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ADP2387ACPZN-R7 数据表(HTML) 13 Page - Analog Devices |
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13 / 25 page ![]() Data Sheet ADP2387 Rev. C | Page 13 of 25 POWER GOOD The power-good pin (PGOOD) is an active high, open-drain output that requires an external resistor to pull it up to a voltage. A logic high on the PGOOD pin indicates that the voltage on the FB pin (and, therefore, the output voltage) is within regulation. The power-good circuitry monitors the output voltage on the FB pin and compares it to the rising and falling thresholds that are specified in Table 1. If the rising output voltage exceeds the target value, the PGOOD pin is held low. The PGOOD pin continues to be held low until the falling output voltage returns to the target value. If the output voltage falls below the target output voltage, the PGOOD pin is held low. The PGOOD pin continues to be held low until the rising output voltage returns to the target value. The power-good rising and falling thresholds are shown in Figure 30. There is a 1024 clock cycle waiting period before the PGOOD pin is pulled from low to high, and there is a 16 clock cycle waiting period before the PGOOD pin is pulled from high to low. 100% 116.7% 105% 90% 95% PGOOD VOUT RISING VOUT FALLING 1024 CYCLE DEGLITCH 16 CYCLE DEGLITCH 1024 CYCLE DEGLITCH 16 CYCLE DEGLITCH Figure 30. PGOOD Rising and Falling Thresholds PEAK CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION The ADP2387 has a peak current-limit protection circuit to prevent current runaway. A resistor between ILIM and GND programs the peak current-limit threshold according to the following equation: ( ) 5 . 0 kΩ 405 (A) + = ILIM OCP R I where: IOCP is the peak current-limit threshold. RILIM is the resistor between ILIM and GND. Figure 31 shows the typical relationship between the peak current-limit threshold and RILIM. During the initial soft start, the ADP2387 uses frequency foldback to prevent output current runaway. The switching frequency reduces according to the voltage on the FB pin, which allows more time for the inductor to discharge. Table 5 shows the correlation between the switching frequency and FB pin voltage. RILIM (kΩ) 2 10 9 8 7 6 5 4 3 40 60 80 100 120 140 160 180 200 Figure 31. Peak Current-Limit Threshold vs. RILIM Table 5. FB Pin Voltage and Switching Frequency FB Pin Voltage Switching Frequency VFB ≥ 0.4 V fSW 0.4 V > VFB ≥ 0.2 V fSW/2 VFB < 0.2 V fSW/4 For protection against heavy loads, the ADP2387 uses a hiccup mode for overcurrent protection. When the inductor peak current reaches the current-limit value, the high-side MOSFET turns off and the low-side MOSFET turns on until the next cycle. The overcurrent counter increments during this process. If the overcurrent counter reaches 10 or if the FB pin voltage falls to 0.4 V after the soft start, the regulator enters hiccup mode. The high-side and low-side MOSFETs both turn off. The regulator remains in hiccup mode for 4096 clock cycles and then attempts to restart. If the current-limit fault clears, the regulator resumes normal operation. Otherwise, it reenters hiccup mode. The ADP2387 also provides a sink current-limit to prevent the low-side MOSFET from sinking excessive current from the load. When the voltage across the low-side MOSFET exceeds the sink current-limit threshold, which is typically 2.5 A, the low-side MOSFET turns off immediately for the rest of the cycle. Both high- side and low-side MOSFETs turn off until the next clock cycle. In some cases, the input voltage (VPVIN) ramp rate is too slow or the output capacitor is too large for the output to reach regulation during the soft start process, which causes the regulator to enter hiccup mode. To avoid such occurrences, use a resistor divider at the EN pin to program the input voltage UVLO, or use a longer soft start time. OVERVOLTAGE PROTECTION (OVP) The ADP2387 includes an overvoltage protection feature to protect the regulator against an output short to a higher voltage supply or when a strong load disconnect transient occurs. If the feedback voltage increases to 0.7 V, the internal high-side and low-side MOSFETs turn off until the voltage at the FB pin decreases to 0.63 V. At that time, the ADP2387 resumes normal operation. |
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