ADP2387ACPZN-R7 datasheet(22/25 Pages) AD

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ADP2387

Data Sheet

Rev. C | Page 22 of 25

CIRCUIT BOARD LAYOUT RECOMMENDATIONS

Good printed circuit board (PCB) layout is essential for obtaining

the best performance from the ADP2387. Poor PCB layout

can degrade the output regulation, as well as the EMI and

electromagnetic compatibility (EMC) performance. Figure 37

shows an example of a good PCB layout for the ADP2387. For

optimum layout, refer to the following guidelines:

•

Use separate analog ground planes and power ground

planes. Connect the ground reference of sensitive analog

circuitry, such as output voltage divider components, to

analog ground. In addition, connect the ground reference

of power components, such as input and output capacitors,

to power ground. Connect both ground planes to the

exposed GND pad of the ADP2387.

•

Place the input capacitor, inductor, and output capacitor as

close as possible to the IC, and use short traces. Ensure that

the high current loop traces are as short and as wide as

possible. Make the high current path from the input

capacitor through the inductor, the output capacitor, and

the power ground plane back to the input capacitor as

short as possible by ensuring that the input and output

capacitors share a common power ground plane.

In addition, ensure that the high current path from the

power ground plane through the inductor and output

capacitor back to the power ground plane is as short as

possible by tying the PGND pins of the ADP2387 to the

PGND plane as close as possible to the input and output

capacitors.

•

Connect the exposed GND pad of the ADP2387 to a large,

external copper ground plane to maximize its power

dissipation capability and to minimize junction temperature.

In addition, connect the exposed SW pad to the SW pins

of the ADP2387, using short, wide traces; or connect the

exposed SW pad to a large external copper plane of the

switching node for high current flow.

•

Place the feedback resistor divider network as close as

possible to the FB pin to prevent noise pickup. Minimize

the length of the trace that connects the top of the feedback

resistor divider to the output while keeping the trace away

from the high current traces and the switching node to

avoid noise pickup. To further reduce noise pickup, place

an analog ground plane on either side of the FB trace and

ensure that the trace is as short as possible to reduce the

parasitic capacitance pickup.

ADP2387

BST

COMP

PGOOD

GND

ILIM

VREG

PGND

PVIN

VIN

CVREG

CIN

COUT

RILIM

CBST

VOUT

RTOP

RBOT

CSS

Figure 36. High Current Path in the PCB Circuit

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