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AS3722 数据表(PDF) 24 Page - ams AG

部件名 AS3722
功能描述  Multi-Phase DCDC Controller PMIC
PDF  198 Pages
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制造商  AMSCO [ams AG]
网页  http://www.ams.com
标志 AMSCO - ams AG

AS3722 数据表(HTML) 24 Page - ams AG

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Page 24
ams Datasheet
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[v1-01] 2015-Sep-07
AS3722 − Detailed Descriptions- Power Management Functions
It’s possible to switch between these two modes during
operation.
Power Save Operation (Automatically Controlled)
As soon as the output voltage stays above the desired target
value for a certain time, some internal blocks will be powered
down leaving the output floating to lower the power
consumption. Normal operation starts as soon as the output
drops below the target value for a similar amount of time. To
minimize the accuracy error some internal circuits are kept
powered to assure a minimized output voltage ripple.
Two addition guard bands, based on comparators, are set at
±5% of the target value to react quickly on large
over/under-shoots by immediately turning on the output
drivers without the normal time delays. This ensures a
minimized ripple also in very extreme load conditions.
Fast Regulation Mode
This mode can be used to react faster on sudden load changes
and thus minimize the over-/undershoot of the output voltage.
This mode needs a bigger output capacitor to guarantee the
stability of the regulator. The mode is enabled by setting
sdX_fast =1.
Selectable Frequency Operation
Especially for very low load conditions, e.g. during a sleep mode
of a processor, the switching frequency can be reduced to
achieve a higher efficiency. The frequency for SD2, SD3, SD4
and SD5 can be set to 3 or 4MHz. This mode is selected by setting
sdX_freq to the appropriate value.
100% PMOS ON Mode for Low Dropout Regulation
For low input to output voltage difference the DCDC converter
can use 100% duty cycle for the PMOS transistor, which is then
in LDO mode.
Step-Down Converter Configuration Modes
The step down dc/dc converters have two configuration modes
to deliver different output currents for the applications. The
operating mode is selected by setting the bit sd3_slave,
sd4_slave and sd5_slave (the default is set by the Boot-OTP). It’s
not allowed to set sd3_slave and sd4_slave at the same time.



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