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AS3722 数据表(PDF) 54 Page - ams AG |
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AS3722 数据表(HTML) 54 Page - ams AG |
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54 / 198 page  Page 54 ams Datasheet Document Feedback [v1-01] 2015-Sep-07 AS3722 − Detailed Descriptions- System Functions Reset Reasons Reset can be activated from 10 different sources: • VPOR has been reached (VSUP/VBAT rising from scratch) • VSUP low or VBAT low, ResVoltFall (2.5V) has been reached • Software forced reset by force_reset (soft or hard) • Software forced Power off mode by power_off • ONKEY long press has been detected • External triggered through the pin XRES_IN • External triggered through the pin THERM • Over-temperature T140 (die, SD0, SD1 or SD6) • Watchdog • VSUP overvoltage reached • Transition to standby_mode Voltage Detection There are two types of voltage dependent resets: VPOR and VRESRISE. VPOR monitors the voltage on V2_5 and VRESRISE monitors the voltage on VBAT/VSUP. The linear regulator for V2_5 is always on and uses the voltage VBAT/VSUP as its source. The pin XRES_OUT is only released if V2_5 is above VPOR, VBAT is above ResVoltRise and VSUP is above vsup_min. VRESFALL is only accepted if the reset condition is longer than VRESMASK. This guard time is used to avoid a complete reset of the system in case of short drops of VBAT. Figure 53: VSUP Supervision VSUP Supervision: Describes the behavior of the PMIC when VSUP drops below ResVoltFall depending on OTP bit settings. SupResEn power_off_at_vsuplow auto_off Behavior if VSUP<ResVoltFall 0 x x LowBat interrupt is generated 10 0 Reset cycle is initiated, PMIC will move to “VSUP debonce” state and start-up if VSUP>ResVoltRise 10 1 Reset cycle is initiated, PMIC will move to “VSUP debonce” state and try to start-up if VSUP>ResVoltRise, if not it will go to the “Power off” state 11 x Reset cycle is initiated, PMIC will move to “Power off” state |
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