EDBA164B4PT-1DATF-R datasheet(13/152 Pages) MICRON

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Table 7: IDD Specifications – Dual Die, Dual Channel

VDD2, VDDQ = 1.14–1.30V; VDD1 = 1.70–1.95V; TC = –40°C to +105°C

Symbol

Supply

Speed

Unit

Parameter/Condition

1066

IDD01

VDD1

All devices in operating one bank active-precharge

Conditions for operating devices are:

tCK = tCK(avg) MIN; tRC = tRC (MIN);

CKE is HIGH; CS_n is HIGH between valid commands;

CA bus inputs are SWITCHING;

Data bus inputs are STABLE

IDD02

VDD2, VDDQ

100

IDD2P1

VDD1

0.8

All devices in idle power-down standby current

tCK = tCK(avg) MIN; CKE is LOW;

CS_n is HIGH; All banks are idle;

CA bus inputs are SWITCHING;

Data bus inputs are STABLE

IDD2P2

VDD2, VDDQ

1.8

IDD2PS1

VDD1

0.8

All devices in idle power-down standby current with

clock stop

CK_t = LOW, CK_c = HIGH; CKE is LOW;

CS_n is HIGH; All banks are idle;

CA bus inputs are STABLE;

Data bus inputs are STABLE

IDD2PS2

VDD2, VDDQ

1.8

IDD2N1

VDD1

1.2

All devices in idle non power-down standby current.

tCK = tCK(avg) MIN; CKE is HIGH;

CS_n is HIGH; All banks idle;

CA bus inputs are SWITCHING;

Data bus inputs are STABLE

IDD2N2

VDD2, VDDQ

IDD2NS1

VDD1

1.2

All devices in idle non power-down standby current

with clock stop

CK_t = LOW, CK_c = HIGH; CKE is HIGH;

CS_n is HIGH; All banks are idle;

CA bus inputs are STABLE;

Data bus inputs are STABLE

IDD2NS2

VDD2, VDDQ

IDD3P1

VDD1

1.8

All devices in active power-down standby current

tCK = tCK(avg) MIN; CKE is LOW;

CS_n is HIGH; One bank is active;

CA bus inputs are SWITCHING;

Data bus inputs are STABLE

IDD3P2

VDD2, VDDQ

IDD3PS1

VDD1

1.8

All devices in active power-down standby current with

clock stop

CK_t = LOW, CK_c = HIGH; CKE is LOW;

CS_n is HIGH; One bank is active;

CA bus inputs are STABLE;

Data bus inputs are STABLE

IDD3PS2

VDD2, VDDQ

IDD3N1

VDD1

2.8

All devices in active non power-down standby current

tCK = tCK(avg) MIN; CKE is HIGH;

CS_n is HIGH; One bank active;

CA bus inputs are SWITCHING;

Data bus inputs are STABLE

IDD3N2

VDD2, VDDQ

216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM

IDD Specifications

09005aef85eb530a

216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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