ES9219 datasheet(40/67 Pages) ESS

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ES9219 Datasheet

February 27, 2020

CONFIDENTIAL ADVANCE INFORMATION 1.0.4

ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA Tel (408) 643-8800 • Fax (408) 643-8801

1’b1: Automatic overcurrent shutdown is enabled and will mute the DAC if an overcurrent event exists for the

timeout period (defined by oc_sd_gain).

[6:4]

OC_SD_GAIN

Configures a timeout period before the automatic overcurrent detection circuit triggers a DAC mute.

3’d0: A timeout will never occur, which disables the overcurrent shutdown logic (default).

3’d1-3’d7: Selects the amount of time (MCLK dependent) before an overcurrent flag triggers an automatic

shutdown.

[3:0]

RESERVED

I2C Slave Access:

I2S Sync Slave Access:

Clock Domain:

Bits

[7:4]

[3:0]

Mnemonic

DPLL_BW_SERIAL

DPLL_BW_DSD

Bits

Mnemonic

Description

[7:4]

DPLL_BW_SERIAL

Sets the bandwidth of the DPLL when operating in I2S/SPDIF mode.

4’d0: DPLL Off

4’d1: Lowest Bandwidth

4’d2:

4’d3:

4’d4:

4’d5: (default)

4’d6:

4’d7:

4’d8:

4’d9:

4’d10:

4’d11:

4’d12:

4’d13:

4’d14:

4’d15: Highest Bandwidth

[3:0]

DPLL_BW_DSD

Sets the bandwidth of the DPLL when operating in DSD mode.

4’d0: DPLL Off

4’d1: Lowest Bandwidth

4’d2:

4’d3:

4’d4:

4’d5:

4’d6:

4’d7:

4’d8:

4’d9:

4’d10: (default)

4’d11:

4’d12:

4’d13:

4’d14:

4’d15: Highest Bandwidth

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