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STP08CDC596 数据表(PDF) 4 Page - STMicroelectronics |
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STP08CDC596 数据表(HTML) 4 Page - STMicroelectronics |
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4 / 20 page ![]() STP08CDC596 4/20 Table 8: Switching Characteristics (VDD=3.3 to 5.5V, T = 25°C, unless otherwise specified.) EQUIVALENT CIRCUIT OF INPUTS AND OUTPUTS Figure 2: OE/DM2 Terminal Symbol Parameter Test Conditions Min. Typ. Max. Unit tPLH1 Propagation Delay Time, CLK-OUTn, LE/DM1 = H, OE/DM2 = L VDD = 3 V VIH = VDD VIL = GND CL = 13pF IO = 40mA VL = 3 V REXT = 470 Ω RL = 65 Ω 180 280 ns tPLH2 Propagation Delay Time, LE/DM1-OUTn, OE/DM2 = L 150 280 ns tPLH3 Propagation Delay Time, OE/DM2-OUTn, LE/DM1 = H 140 280 ns tPLH Propagation Delay Time, CLK-SDO 25 35 ns tPHL1 Propagation Delay Time, CLK-OUTn, LE/DM1 = H, OE/DM2 = L 30 60 ns tPHL2 Propagation Delay Time, LE/DM1-OUTn, OE/DM2 = L 30 50 ns tPHL3 Propagation Delay Time, OE/DM2-OUTn, LE/DM1 = H 35 70 ns tPHL Propagation Delay Time, CLK-SDO 30 40 ns tr Output Rise Time 220 ns tf Output Fall Time 20 ns |
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