AL4CS211/AL4CS221/AL4CS231/AL4CS241/AL4CS251
AL4CS211/AL4CS221/AL4CS231/AL4CS241/AL4CS251
December 14, 2001
8
/REN2
Read Enable 8
12
I
When /REN1 and /REN2 are LOW, data is read
from the FIFO on every rising edge of RCLK.
Data will not be read from the FIFO if the /EF is
LOW.
/OE
Output
Enable
9
13
I
When /OE is LOW, the data output bus is
active. If /OE is HIGH, the output data bus will
be in high-impedance.
RCLK
Read Clock
7
11
I
Data is read from the FIFO on a rising edge of
RCLK when /REN1 and /REN2 are LOW, and
if the FIFO is not empty.
Miscellaneous & Flags Signals
Pin
Symbol
Pin name
TQFP
Pin no.
PLCC
Pin no.
I/O
typ
Description
/RS
Reset
25
29
I
When /RS is set LOW, internal read and write
pointers are set to the first location of the RAM
array, /FF and /PAF go HIGH, and /PAE and
/EF go LOW. A reset is required before an
initial WRITE after power-up.
/FF
Full Flag
11
15
O
/FF indicates whether or not the FIFO memory
is full.
/EF
Empty Flag
10
14
O
/EF indicates whether or not the FIFO memory
is empty.
/PAE
Programmabl
e Almost-
Full Flag
4
8
O
When /PAE is LOW, the FIFO is Almost-Empty
based on the offset programmed into the FIFO.
/PAF
Programmabl
e Almost-
Full Flag
3
7
O
When /PAF is LOW, the FIFO is Almost –Full
based on the offset programmed into the FIFO.
Power/Ground Signals
Pin
Symbol
Pin name
TQFP
Pin no.
PLCC
Pin no.
I/O
typ
Description
VCC
Power
21
25
-
3.3V
± 10% power supply
GND
Ground
5
9
-
Ground.
8.0 Memory Operations
8.1 Inputs and Outputs
8.1.1 DATA INPUTS (D8 ~ D0)
D8 ~ D0 are 9-bit wide of input data port.
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