Data Sheet

ADP7112

Rev. D | Page 15 of 21

PROGRAMABLE PRECISION ENABLE

The ADP7112 uses the EN pin to enable and disable the VOUT

pin under normal operating conditions. As shown in Figure 44,

when a rising voltage on EN crosses the upper threshold,

nominally 1.2 V, VOUT turns on. When a falling voltage on EN

crosses the lower threshold, nominally 1.1 V, VOUT turns off.

The hysteresis of the EN threshold is typically 100 mV.

1.30

1.25

1.20

1.15

1.10

1.05

0

0.5

1.0

1.5

2.0

2.5

3.5

3.0

–40°C

+25°C

+125°C

The upper and lower thresholds are user programmable and can be

set higher than the nominal 1.2 V threshold by using two resistors.

(6)

(7)

For the example shown in Figure 45, the enable threshold is

3.6 V with a hysteresis of 300 mV.

VOUT

SENSE/ADJ

VIN

ADP7112

GND

2.2µF

2.2µF

EN

OFF

ON

R1

2kΩ

R2

10kΩ

200kΩ

100kΩ

Figure 45. Typical EN Pin Voltage Divider

Figure 44 shows the typical hysteresis of the EN pin. This pre-

vents on/off oscillations that can occur due to noise on the EN pin

as it passes through the threshold points.

SOFT START

The ADP7112 uses an internal soft start (SS pin open) to limit the

inrush current when the output is enabled. The start-up time for

the 3.3 V option is approximately 380 μs from the time the EN

active threshold is crossed to when the output reaches 90% of

the final value. As shown in Figure 46, the start-up time is

dependent on the output voltage setting.

TIME (ms)

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

0

1

2

3

4

6

5

Figure 46. Typical Start-Up Behavior

An external capacitor connected to the SS pin determines the

soft start time. This SS pin can be left open for a typical 380 μs

start-up time. Do not ground this pin. When an external soft

the following equation:

(8)

where:

TIME (ms)

10

9

8

7

6

5

4

3

2

1

0

0

0.5

1.0

2.0

3.0

3.5

1.5

2.5

NO SS CAP

1nF

2nF

4.7nF

6.8nF

10nF