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ADP7185ACPZN-R7 数据表(PDF) 15 Page - Analog Devices

部件名 ADP7185ACPZN-R7
功能描述  ??00 mA, Ultralow Noise, High PSRR, Low Dropout Linear Regulator
PDF  19 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP7185ACPZN-R7 数据表(HTML) 15 Page - Analog Devices

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Data Sheet
ADP7185
Rev. 0 | Page 15 of 19
APPLICATIONS INFORMATION
ADIsimPOWER DESIGN TOOL
The ADIsimPower™ design tool set supports the ADP7185.
ADIsimPower is a collection of tools that produce complete
power designs optimized for a specific design goal. The tools
enable the user to generate a full schematic, bill of materials,
and calculate performance in minutes. ADIsimPower can
optimize designs for cost, area, efficiency, and parts count,
taking into consideration the operating conditions and
limitations of the IC and all external components. For more
information about, and to obtain ADIsimPower design tools,
visit www.analog.com/ADIsimPower.
CAPACITOR SELECTION
Output Capacitor
The ADP7185 operates with small, space-saving ceramic
capacitors; however, it also functions with general-purpose
capacitors as long as care is taken with regard to the effective
series resistance (ESR) value. The ESR of the output capacitor
affects the stability of the LDO regulator control loop. A
minimum of 4.7 μF capacitance with an ESR of 0.05 Ω or less is
recommended to ensure the stability of the ADP7185. Output
capacitance affects the transient response to changes in load
currents. Using a larger value for the output capacitance improves
the transient response of the ADP7185 to large changes in load
current. Figure 46 shows the transient response for an output
capacitance value (COUT) of 4.7 μF.
CH1 –475mA
500mA/DIV
CH2 5.0mV
9.9mV
10.0µs/DIV
2MS 20GS/s
STOP –220mA
EDGE POSITIVE
2
1
ILOAD
VOUT
Figure 46. Output Transient Response, COUT = 4.7 μF, VOUT = −1.2 V
Input Bypass Capacitor
Connecting a 4.7 μF or greater capacitor from VIN to GND
reduces the circuit sensitivity to the PCB layout, especially when
long input traces or high source impedance are encountered.
When more than 4.7 μF of output capacitance is required,
increase the input capacitance to match it.
CA and CAFB Capacitors
The ultralow output noise of the ADP7185 is achieved by
keeping the LDO error amplifier in unity gain and setting the
reference voltage equal to the output voltage. In this architecture,
the resistor driven by the GM amplifier adjusts the reference
voltage to the selected output voltage. To ensure the GM amplifier
stability, the CA capacitor is needed to generate the dominant
pole and to keep the GM amplifier stable across all conditions.
CA also serves as a dampening capacitor to the inputs of the
LDO error amplifier for improved PSRR. However, the LDO
output noise scales by the GM amplifier amount of gain as a
function of the output voltage. To minimize the output voltage
noise contributed by the GM amplifier, the CAFB capacitor must
be connected between the VA and VAFB pins to keep the ac
gain of the GM amplifier in unity.
REFERENCE
GM
VA
VAFB
GND
CAFB
CA
R2
R1
Figure 47. CA and CAFB Connection to the GM Amplifier
Input and Output Capacitor Properties
Any good quality ceramic capacitors can be used with the
ADP7185 if they meet the minimum capacitance and maximum
ESR requirements. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior over temperature
and applied voltage. Capacitors must have a dielectric adequate to
ensure the minimum capacitance over the necessary temperature
range and dc bias conditions. X5R and X7R dielectrics with a
voltage rating from 6.3 V to 10 V are recommended. Due to their
poor temperature and dc bias characteristics, Y5V and Z5U
dielectrics are not recommended.



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