ADP322ACPZ-189-R7 datasheet(5/24 Pages) AD

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Data Sheet

ADP322/ADP323

Rev. E | Page 5 of 24

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter

Rating

VIN1/VIN2, VIN3, VBIAS to GND

−0.3 V to +6.5 V

VOUT1, VOUT2, FB1, FB2 to GND

−0.3 V to VIN1/VIN2

VOUT3, FB3 to GND

−0.3 V to VIN3

EN1, EN2, EN3 to GND

−0.3 V to +6.5 V

Storage Temperature Range

−65°C to +150°C

Operating Junction Temperature Range

−40°C to +125°C

Soldering Conditions

JEDEC J-STD-020

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

THERMAL DATA

Absolute maximum ratings apply individually only, not in

combination.

The ADP322/ADP323 triple LDO can be damaged when the

junction temperature limits are exceeded. Monitoring ambient

temperature does not guarantee that the junction temperature

(TJ) is within the specified temperature limits. In applications

with high power dissipation and poor thermal resistance, the

maximum ambient temperature may have to be derated. In

applications with moderate power dissipation and low printed

circuit board (PCB) thermal resistance, the maximum ambient

temperature can exceed the maximum limit as long as the

junction temperature is within specification limits.

The junction temperature (TJ) of the device is dependent on the

ambient temperature (TA), the power dissipation of the device

(PD), and the junction to ambient thermal resistance of the package

(θJA). Maximum junction temperature (TJ) is calculated from

the ambient temperature (TA) and power dissipation (PD) using

the following formula:

TJ = TA + (PD × θJA)

Junction to ambient thermal resistance (θJA) of the package is

based on modeling and calculation using a 4-layer board. The

junction to ambient thermal resistance is highly dependent on

the application and board layout. In applications where high

maximum power dissipation exists, close attention to thermal

board design is required. The value of θJA can vary, depending

on PCB material, layout, and environmental conditions. The

specified values of θJA are based on a 4-layer, 4 inch × 3 inch circuit

board. See JEDEC JESD 51-9 for detailed information on the

board construction. For additional information, see the AN-617

Application Note, MicroCSP™ Wafer Level Chip Scale Package.

ΨJB is the junction to board thermal characterization parameter

with units of °C/W. ΨJB of the package is based on modeling and

calculation using a 4-layer board. The JESD51-12, Guidelines for

Reporting and Using Package Thermal Information, states that

thermal characterization parameters are not the same as thermal

resistances. ΨJB measures the component power flowing through

multiple thermal paths rather than a single path as in thermal

resistance, θJB. Therefore, ΨJB thermal paths include convection

from the top of the package as well as radiation from the package,

factors that make ΨJB more useful in real-world applications.

Maximum junction temperature (TJ) is calculated from the board

temperature (TB) and power dissipation (PD) using the following

formula:

TJ = TB + (PD × ΨJB)

See JEDEC JESD51-8 and JESD51-12 for more detailed infor-

mation about ΨJB.

THERMAL RESISTANCE

θJA and ΨJB are specified for the worst case conditions, that is, a

device soldered in a circuit board for surface-mount packages.

Table 4.

Package Type

θJA

ΨJB

Unit

16-Lead, 3 mm × 3 mm LFCSP

49.5

25.2

°C/W

ESD CAUTION

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