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ADP322ACPZ-189-R7 数据表(PDF) 19 Page - Analog Devices |
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ADP322ACPZ-189-R7 数据表(HTML) 19 Page - Analog Devices |
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19 / 24 page  Data Sheet ADP322/ADP323 Rev. E | Page 19 of 24 NOISE REDUCTION OF THE ADP323 IN ADJUSTABLE MODE The adjustable LDO circuit can be modified to reduce the output voltage noise to levels close to that of the 500 mV output ADP323. The circuit shown in Figure 56 adds two additional components to the output voltage setting resistor divider. CNR and RNR are added in parallel with R1 to reduce the ac gain of the error amplifier. RNR is chosen to be small with respect to R2. If RNR is 1% to 10% of the value of R2, the minimum ac gain of the error amplifier is approximately 0.1 dB to 0.8 dB. The actual gain is determined by the parallel combination of RNR and R1. This gain ensures that the error amplifier always operates at slightly greater than unity gain. CNR is chosen by setting the reactance of CNR equal to R1 − RNR at a frequency between 1 Hz and 50 Hz. This setting places the frequency where the ac gain of the error amplifier is 3 dB down from its dc gain. The noise of the adjustable LDO is found by using the following formula, assuming the noise of the 500 mV output is approxi- mately 14 μV. Noise = 14 μV × (RPAR + R2)/R2 (1) where RPAR is a parallel combination of R1 and RNR. Based on the component values shown in Figure 56, the ADP323 has the following characteristics: • DC gain of 5 (13.98 dB) • 3 dB roll-off frequency of 0.79 Hz • High frequency ac gain of 1.02 (0.17 dB) • Theoretical noise reduction factor of 4.9 (13.8 dB) • Measured rms noise of the adjustable LDO without noise reduction is 39.5 µV rms • Measured rms noise of the adjustable LDO with noise reduction is 14.4 µV rms • Measured noise reduction of approximately 8.8 dB LDO 1 ADP323 EN LD1 VOUT1 = 1.5V GND FB1 VBIAS VBIAS VBIAS R2 50kΩ RNR1 1kΩ R1 100kΩ CNR1 1µF 1µF LDO 2 EN LD2 LDO 3 EN LD3 VOUT2 = 2.5V FB2 R4 50kΩ RNR2 1kΩ R3 200kΩ CNR2 1µF 1µF VOUT3 = 3.3V FB3 R6 35.7kΩ RNR3 1kΩ R5 200kΩ CNR3 1µF 1µF VBIAS OFF ON EN1 OFF ON EN2 OFF ON EN3 1µF + 2.5V TO 5.5V VIN1/VIN2 VIN3 1µF + 3.0V TO 5.5V 3.8V TO 5.5V 1µF + Figure 56. Noise Reduction Modification |
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