ADP1764

Data Sheet

Rev. A | Page 16 of 20

Therefore, the capacitor chosen in this example meets the

minimum capacitance requirement of the LDO over temperature

and tolerance at the chosen output voltage.

To guarantee the performance of the ADP1764, it is imperative

to evaluate the effects of dc bias, temperature, and tolerances on

the behavior of the capacitors for each application.

UNDERVOLTAGE LOCKOUT

The ADP1764 has an internal undervoltage lockout (UVLO)

circuit that disables all inputs and the output when the input

voltage is less than approximately 1.06 V. The UVLO ensures that

the ADP1764 inputs and output behave in a predictable manner

during power-up.

CURRENT-LIMIT AND THERMAL OVERLOAD

PROTECTION

The ADP1764 is protected against damage due to excessive power

dissipation by current-limit and thermal overload protection

circuits. The ADP1764 is designed to reach the current limit

when the output load reaches 6.5 A (typical). When the output

load exceeds 6.5 A, the output voltage is reduced to maintain a

constant current limit.

Thermal overload protection is included that limits the junction

temperature to a maximum of 152°C (typical). Under extreme

conditions (that is, high ambient temperature and power dissipa-

tion) when the junction temperature begins to rise above 152°C,

the output turns off, reducing the output current to zero. When the

junction temperature drops below 136°C (typical), the output turns

on again, and the output current is restored to its nominal value.

Consider the case where a hard short from VOUT to ground

occurs. At first, the ADP1764 reaches the current limit so that

only 6.5 A is conducted into the short. If self-heating of the

junction becomes great enough to cause its temperature to rise

above 152°C, thermal shutdown activates, turning off the

output and reducing the output current to zero. As the junction

temperature cools and drops below 136°C, the output turns on

and conducts 6.5 A into the short, again causing the junction

temperature to rise above 152°C. This thermal oscillation between

136°C and 152°C causes a current oscillation between 6.5 A and

0 A that continues as long as the short remains at the output.

Current-limit and thermal overload protections are intended to

protect the device against accidental overload conditions. For

reliable operation, device power dissipation must be externally

limited so that junction temperatures do not exceed 125°C.

PARALLELING ADP1764 DEVICES FOR HIGH

CURRENT APPLICATIONS

In applications where high output current is required while

maintaining low noise and high PSRR performance, connect two

ADP1764 devices in parallel to handle loads up to 7 A.

When paralleling the ADP1764, the two outputs must be of the

same voltage setting to maintain good current sharing between

the two LDOs. To improve current sharing accuracy, add identical

in Figure 49. Note that large ballast resistors improve current

sharing accuracy, but degrade the load regulation performance

and increase the losses along the power line. Therefore, it is best

to keep the ballast resistors at a minimum. In addition, tie the

VADJ, SS, and REFCAP pins of the LDO regulators together to

minimize error between the two outputs.

Use Equation 5 to calculate the output of the two paralleled

ADP1764 LDOs.

(5)

where:

VADJ pin and VOUT pin.

VIN

EN

ENABLE

SS

VREG

VOUT

SENSE

22µF

PG

VADJ

GND

REFCAP

22µF

ADP1764

VIN

EN

SS

VOUT

SENSE

22µF

PG

VADJ

GND

REFCAP

22µF

ADP1764

1µF

1µF

4.02kΩ

100kΩ

1nF

1µF

1µF

Figure 49. Two ADP1764 Devices Connected in Parallel to Achieve Higher Current Output