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STM32WL55JC 数据表(PDF) 13 Page - STMicroelectronics |
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STM32WL55JC 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 147 page  DS13293 Rev 2 13/147 STM32WL55/54xx Description 14 Timer General purpose 4 Low-power 3 SysTick 1 Communication interface SPI/I2S 2 (1 supporting I2S) I2C3 USART 2 LPUART 1 Watchdog Independent 1 Window 1 RTC (with wakeup counter) 1 DMA (7 channels) 2 Mailbox and semaphores 1 Security AES 256 bits 1 RNG 1 PKA 1 PCROP, RDP, WRP 1 CRC 1 64-bit UID compliant with IEEE 802-2001 standard 1 96-bit die ID 1 Storage and management of secure keys 1 Secure sub-GHz MAC layer 1 Secure firmware update 1 Secure firmware install 1 Tamper pins 3 3 2 Wakeup pins 3 3 2 GPIOs 29 43 22 ADC (number of channels, ext + int) 1 (9 + 4) 1 (12 + 4) 1 (8 + 4) DAC (number of channels) 1 (1) Internal VREFBUF No Yes No Analog comparator 2 Operating voltage 1.8 to 3.6 V Table 2. Main features and peripheral count (continued) Feature STM32WL55Cx STM32WL54Cx STM32WL55Jx STM32WL54Jx STM32WL55Ux STM32WL54Ux |
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