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ADP166ACBZ-3.3-R7 数据表(PDF) 5 Page - Analog Devices

部件名 ADP166ACBZ-3.3-R7
功能描述  Very Low Quiescent Current, 150 mA, LDO Regulator
PDF  23 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP166ACBZ-3.3-R7 数据表(HTML) 5 Page - Analog Devices

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Data Sheet
ADP165/ADP166
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Rating
VIN to GND
−0.3 V to +6.5 V
VOUT to GND
−0.3 V to VIN
EN to GND
−0.3 V to VIN
ADJ to GND
−0.3 V to VIN
NC to GND
−0.3 V to VIN
Storage Temperature Range
−65°C to +150°C
Operating Junction Temperature Range
−40°C to +125°C
Operating Ambient Temperature Range
−40°C to +125°C
Soldering Conditions
JEDEC J-STD-020
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL DATA
Absolute maximum ratings only apply individually; they do not
apply in combination. The ADP165/ADP166 can be damaged
when the junction temperature limits are exceeded. Monitoring
ambient temperature does not guarantee that the junction
temperature (TJ) is within the specified temperature limits. In
applications with high power dissipation and poor thermal
resistance, the maximum ambient temperature may have to be
derated.
In applications with moderate power dissipation and low printed
circuit board (PCB) thermal resistance, the maximum ambient
temperature can exceed the maximum limit as long as the junction
temperature is within specification limits. TJ is dependent on
the ambient temperature (TA), the power dissipation of the
device (PD), and the junction-to-ambient thermal resistance of
the package (θJA).
Maximum TJ is calculated from TA and PD using the formula
TJ = TA + (PD × θJA)
Junction-to-ambient thermal resistance (θJA) of the package is
based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on the
application and board layout. In applications where high maximum
power dissipation exists, close attention to thermal board design
is required. The value of θJA may vary, depending on PCB material,
layout, and environmental conditions. The specified values of
θJA are based on a 4-layer, 4 inches × 3 inches, circuit board. Refer
to JESD 51-7 and JESD 51-9 for detailed information on the
board construction.
ΨJB is the junction to board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
calculation using a 4-layer board. The JESD51-12, Guidelines for
Reporting and Using Electronic Package Thermal Information,
states that thermal characterization parameters are not the same
as thermal resistances. ΨJB measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance (θJB). Therefore, ΨJB thermal paths include
convection from the top of the package as well as radiation from
the package, factors that make ΨJB more useful in real-world
applications. Maximum TJ is calculated from the board
temperature (TB) and PD using the formula
TJ = TB + (PD × ΨJB)
Refer to JESD51-8 and JESD51-12 for more detailed information
about ΨJB.
THERMAL RESISTANCE
θJA and ΨJB are specified for worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
θJA
ΨJB
Unit
5-Lead TSOT
170
43
°C/W
6-Lead LFCSP
50.2
18.2
°C/W
4-Ball, 0.4 mm Pitch WLCSP
260
58
°C/W
ESD CAUTION
Rev. A | Page 5 of 23



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