AD5535

Preliminary Technical Data

Rev. PrE | Page 14 of 16

POWER SUPPLY SEQUENCING AND DECOUPLING

RECOMMENDATIONS

The diagram in Figure 17 shows the recommended decoupling,

and power supply protection for the AD5535. On the AD5535 it

is recommended that all grounds be tied together as close to the

device as possible. All supplies should be brought back

separately and a provision be made on the board via a link

required to reduce the number of supplies. All power supplies

should be adequately decoupled with 10 uF tantalum and 0.1 uF

must be rated at greater than 210 V. To overcome issues

associated with power supply sequencing when using high

voltage supplies, the use of protection diodes as indicated in

Figure 17 is recommended.

AGND

DACGND

DGND

PGND

AD5535

SD103C

RS1G

10

µF

10

µF

0.1

µF

0.1

µF

0.1

µF

10

µF

10

µF

10

µF

0.1

µF

0.1

µF

HIGH VOLTAGE DIODE

MFTR: GS

SCHOTTKY DIODE

MFTR: ITT

Figure 17. Recommended Power Supply Sequencing and Decoupling

GUIDELINES FOR PRINTED CIRCUIT BOARD

LAYOUT

Printed circuit boards should be designed such that the analog

and digital sections are separated and confined to designated

analog and digital sections of the board. This facilitates the use

of ground planes that can be separated easily. A minimum etch

technique is generally found to be the best for ground planes,

because this optimizes shielding of sensitive signal lines. Digital

and analog grounds planes should be joined only in one place,

at the AGND and DGND pins of the high resolution converter.

Data and address busses on the board should be buffered or

latched to isolate the high frequency bus of the processor from

the bus of the high-resolution converters. These act as a faraday

shield and increase the signal-to-noise performance of the

converters by reducing the amount of high frequency digital

coupling. Avoid running digital lines under the device, becaus

they couple noise onto the die. The ground plane shou

e

ld be

es to

ts

osite

to reduce the effects of feedthrough

ble

mum

alog performance but at

to

tored in

ce

s

rs should be decoupled again with

le high frequency effects associated with

digital circuitry.

allowed to run under the IC to avoid noise coupling.

As large a trace as possible should be used for the supply lin

the device to provide low impedance paths and reduce the

effects of glitches on the power supply line. Fast switching

signals like clocks should be shielded with digital ground to

avoid radiating noise to other sections of the board, and clock

signals should never be run near analog inputs of devices. Avoid

crossovers of digital and analog signals. Traces for analog inpu

should be kept as wide and as short as possible and should be

shielded with analog ground where possible. Traces on opp

sides of a 2-layer printed circuit board should run at right

angles to each other

through the board.

A microstrip technique is by far the best, but not always possi

with a double-sided board. In this technique the component

side of the board is dedicated to ground planes, and signals are

placed on the solder side. Multilayer printed circuit boards with

dedicated ground, power, and tracking layers offer the opti

solution in terms of obtaining an

increased manufacturing costs.

Good decoupling is vitally important when using high resolu-

tion converters. All analog supplies should be decoupled with

10 µF tantalum in parallel with 0.1 µF ceramic capacitors

analog ground. To achieve the best from the decoupling

components, these have to be placed as close to the device as

possible ideally right up against the IC or IC socket. The main

aim of a bypassing element is to maximize the charge s

the bypass loop while simultaneously minimizing the

inductance of this loop. Inductance in the loop acts as an

impedance to high frequency transients and results in power

supply spiking. By keeping the decoupling as close to the devi

as possible, the loop area is kept as small as possible, thereby

reducing the possibility of power-supply spikes. Digital supplie

of high resolution converters should be decoupled with 10 µF

tantalum and 0.1 µF ceramic to the digital ground plane. VDD

and VSS supplies of amplifie

10 µF and 0.1 µF to AGND.

All logic chips should be decoupled with 0.1µF to digital

ground to decoup