ADA4622-2ACPZ-R7 datasheet(33/38 Pages) AD

33 / 38 page

Data Sheet

ADA4622-1/ADA4622-2/ADA4622-4

Rev. E | Page 33 of 38

PEAK DETECTOR

A peak detector captures the peak value of a signal and produces an

output equal to it. By taking advantage of the dc precision and

super low input bias current of the JFET input amplifiers, such as

the ADA4622-1/ADA4622-2/ADA4622-4, a highly accurate

peak detector can be built, as shown in Figure 99.

ADA4622-1/

ADA4622-2/

ADA4622-4

ADA4622-1/

ADA4622-2/

ADA4622-4

VIN

–

V–

V+

V–

V+

50pF

1µF

1kΩ

10kΩ

1N448

1N4148

+PEAK

1N4148

Figure 99. Positive Peak Detector

In this application, D3 and D4 act as unidirectional current

switches that open when the output is kept constant in hold mode.

To detect a positive peak, U1 drives C3 through D3 and drives

D4 until C3 is charged to a voltage equal to the input peak value.

Feedback from the output of the U2 (positive peak) through R6

limits the output voltage of U1. After detecting the peak, the

output of U1 swings low but is clamped by D2. D3 reverses bias

and the common node of D3, D4, and R7 is held to a voltage

equal to positive peak by R7. The voltage across D4 is 0 V;

therefore, the leakage is small. The bias current of U2 is also

small. With almost no leakage, C3 has a long hold time.

The ADA4622-1/ADA4622-2/ADA4622-4, shown in Figure 99,

are a perfect fit for building a peak detector because U1 requires

dc precision and high output current during fast peaks, and U2

requires low input bias current (IB) to minimize capacitance

discharge between peaks. A low leakage and low dielectric

absorption capacitor, such as polystyrene or polypropylene, is

required for C3. Reversing the diode directions causes the

circuit to detect negative peaks.

MULTIPLEXING INPUTS

By using the ADA4622-1 DISABLE input, it is possible to multi-

plex two inputs to a single output by using the circuit shown in

Figure 100. If the gain configuration or filter configuration of

the two amplifiers is different, and a common single input to

both amplifiers is used, this configuration can control selectable

gain or selectable frequency response at the output.

V+

–

ADA4622-1

V–

VOUT

–

V–

DISABLE

Figure 100. Multiplexed Input Circuit

Figure 101 shows the output response when multiplexing two

input signals. The input to the first amplifier is a 4 V p-p,

200 kHz sine wave; the input to the second amplifier is an

8 V p-p, 100 kHz sine wave.

OUTPUT

VLOGIC

TIME

Figure 101. Multiplexed Output

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