ADM3065EARZ-R7 datasheet(21/27 Pages) AD

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Data Sheet

ADM3061E/ADM3062E/ADM3063E/ADM3064E/ADM3065E/ADM3066E/ADM3067E/ADM3068E

Rev. G | Page 21 of 27

TRUTH TABLES

Table 13 and Table 14 use the abbreviations shown in Table 12.

Table 12. Truth Table Abbreviations

Letter

Description

High level

Indeterminate

Low level

Any state

High impedance (off )

Table 13. Transmitting Truth Table

Supply Status

Inputs

Outputs

VIO1

VCC

A/Y

B/Z

Off

1 The VIO pin is not applicable for the ADM3061E/ADM3063E/

ADM3065E/ADM3067E

Table 14. Receiving Truth Table

Supply Status

Inputs

Outputs

VIO1

VCC

A − B

>−0.03 V

<−0.2 V

−0.2 V ≤ A – B ≤

−0.03 V

Inputs open/shorted

Off

1 The VIO pin is not applicable for the ADM3061E/ADM3063E/

ADM3065E/ADM3067E.

RECEIVER FAIL-SAFE

The ADM3061E/ADM3062E/ADM3063E/ADM3064E/

ADM3065E/ADM3066E/ADM3067E/ADM3068E guarantee a

logic high receiver output when the receiver inputs are shorted,

open, or connected to a terminated transmission line with all

drivers disabled. This receiver output is achieved by setting the

receiver input threshold between −30 mV and −200 mV. If the

differential receiver input voltage (A − B) is greater than or equal

to −30 mV, the RO pin is logic high.

If the (A − B) input is less than or equal to −200 mV, the RO pin

is logic low. In the case of a shorted, open circuit or terminated bus

with all transmitters disabled, the receiver differential input

voltage is pulled to 0 V, resulting in a logic high with a 30 mV

minimum noise margin.

HOT SWAP CAPABILITY

When a circuit board is inserted into a powered (or hot)

backplane, differential disturbances to the data bus can lead to

data errors. During this period, processor logic output drivers

are high impedance and are unable to drive the DE and RE

inputs of the RS-485 transceivers to a defined logic level. Leakage

currents up to ±10 μA from the high impedance state of the

processor logic drivers can cause standard complementary

metal-oxide semiconductor (CMOS) enable inputs of a

transceiver to drift to an incorrect logic level. Additionally,

parasitic circuit board capacitance can cause coupling of VCC

or GND to the enable inputs. Without the hot swap capability,

these factors can improperly enable the driver or receiver of

the transceiver. When VCC or VIO rises, an internal pull-down

circuit holds DE low and RE high. After the initial power-up

sequence, the pull-down circuit becomes transparent, resetting

the hot swap tolerable input.

128 TRANSCEIVERS ON THE BUS

The standard RS-485 receiver input impedance is 12 kΩ

(one unit load), and the standard driver can drive up to 32 unit

loads. The ADM3061E/ADM3062E/ADM3063E/ADM3064E/

ADM3065E/ADM3066E/ADM3067E/ADM3068E transceivers

have a 1/4 unit load receiver input impedance (48 kΩ), allowing

up to 128 transceivers to be connected in parallel on one

communication line. Any combination of these devices and

other RS-485 transceivers with a total of 32 unit loads or fewer

can be connected to the line.

DRIVER OUTPUT PROTECTION

The ADM3061E/ADM3062E/ADM3063E/ADM3064E/

ADM3065E/ADM3066E/ADM3067E/ADM3068E feature two

methods to prevent excessive output current and power

dissipation caused by faults or by bus contention. Current-limit

protection on the output stage provides immediate protection

against short circuits over the whole common-mode voltage

range. In addition, a thermal shutdown circuit forces the driver

outputs into a high impedance state if the die temperature rises

excessively. This circuitry is designed to disable the driver

outputs when a die temperature of 150°C is reached. As the

device cools, the drivers are reenabled at a temperature of 140°C.

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