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ADM7150ARDZ-5.0-R7 数据表(PDF) 21 Page - Analog Devices

部件名 ADM7150ARDZ-5.0-R7
功能描述  800 mA Ultralow Noise, High PSRR, RF Linear Regulator
PDF  24 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADM7150ARDZ-5.0-R7 数据表(HTML) 21 Page - Analog Devices

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Data Sheet
ADM7150
Thermal Characterization Parameter (ΨJB)
When board temperature is known, use the thermal
characterization parameter, ΨJB, to estimate the junction
temperature rise (see Figure 69 and Figure 70). Maximum
junction temperature (TJ) is calculated from the board temperature
(TB) and power dissipation (PD) using the following formula:
TJ = TB + (PD × ΨJB)
(5)
The typical value of ΨJB is 15.1°C/W for the 8-lead LFCSP
package and 17.9°C/W for the 8-lead SOIC package.
TOTAL POWER DISSIPATION (W)
9.0
8.5
8.0
7.0
6.0
7.5
6.5
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
160
140
120
100
80
60
40
20
TB = 25°C
TB = 50°C
TB = 65°C
TB = 85°C
TJ MAX
Figure 69. Junction Temperature vs. Total Power Dissipation for
the 8-Lead LFCSP
TOTAL POWER DISSIPATION (W)
5.5
7.5
7.0
6.5
6.0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
160
140
120
100
80
60
40
20
TB = 25°C
TB = 50°C
TB = 65°C
TB = 85°C
TJ MAX
Figure 70. Junction Temperature vs. Total Power Dissipation for
the 8-Lead SOIC
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
Place the input capacitor as close as possible to the VIN and GND
pins. Place the output capacitor as close as possible to the VOUT
and GND pins. Place the bypass capacitors for VREG, VREF, and
VBYP close to the respective pins and GND. Use of an 0805,
0603, or 0402 size capacitor achieves the smallest possible
footprint solution on boards where area is limited.
Figure 71. Example 8-Lead LFCSP PCB Layout
Figure 72. Example 8-Lead SOIC PCB Layout
Rev. 0 | Page 21 of 24



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