ADE7923 datasheet(39/125 Pages) AD

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Data Sheet

ADE7978/ADE7933/ADE7932/ADE7923

Rev. D | Page 39 of 125

Current Channel HPF

The ADC outputs may contain a dc offset that can create errors in

power and rms calculations. High-pass filters (HPFs) are placed

in the signal path of the phase and neutral currents and in the

signal path of the phase voltages. When the HPF is enabled, the

filter eliminates any dc offset on the current channel. All filters

in both current and voltage channels are implemented in the DSP

and are enabled by default: Bit 4 (HPFEN) of the CONFIG register

(Address 0xE618) is set to 1. All filters are disabled by setting

Bit 4 (HPFEN) to 0.

Current Channel Sampling

The waveform samples of the current channel are taken at the

output of the HPF and stored in the 24-bit signed IAWV, IBWV,

ICWV, and INWV registers at a rate of 8 kSPS. All power and

rms calculations remain uninterrupted during this process.

Bit 17 (DREADY) in the STATUS0 register (Address 0xE502) is

set when the IAWV, IBWV, ICWV, and INWV registers are avail-

able to be read using the I2C or SPI serial port. Setting Bit 17

(DREADY) in the MASK0 register (Address 0xE50A) enables

an interrupt to be set when the DREADY flag is set. For more

information about the DREADY bit, see the Digital Signal

Processor section.

In addition, if Bits[1:0] (ZX_DREADY) in the CONFIG register

are set to 00, the DREADY functionality is selected at the

ZX/DREADY pin. In this case, the pin goes low approximately

70 ns after the DREADY bit is set to 1 in the STATUS0 register.

The ZX/DREADY pin stays low for 10 µs and then returns high.

The low to high transition of the ZX/DREADY pin can be used

to initiate a burst read of the waveform sample registers. For more

information, see the I2C Burst Read Operation and the SPI Burst

Read Operation sections.

For information about using the ZX functionality at the

ZX/DREADY pin (ZX_DREADY bits in the CONFIG register

are set to 01, 10, or 11), see the Zero-Crossing Detection section.

The serial ports of the ADE7978 work with 32-, 16-, or 8-bit

words, whereas the DSP works with 28-bit words. When the

24-bit signed IAWV, IBWV, ICWV, and INWV registers are

read from the ADE7978, they are transmitted as sign extended

32-bit registers (see Figure 53).

24 23 22

24-BIT SIGNED NUMBER

BITS[31:24] ARE

EQUAL TO BIT 23

BIT 23 IS A SIGN BIT

Figure 53. 24-Bit IxWV Register Transmitted as a 32-Bit Signed Word

The ADE7978 contains a high speed data capture (HSDC) port

that is specially designed to provide fast access to the waveform

sample registers. For more information, see the HSDC Interface

section.

VOLTAGE CHANNEL ADCs

In this data sheet, the measurements obtained on the voltage

channel of the ADE7933/ADE7932 devices that monitor

Phase A, Phase B, and Phase C are called VA, VB, and VC,

respectively. The measurement obtained on the voltage channel

of the ADE7923 device that monitors the neutral current is

called VN (see Figure 110). VA, VB, VC, and VN represent the

signals measured between the V1P and VM pins of the

ADE7933/ADE7932 devices in the system. The signals measured

between the V2P and VM pins of the ADE7933/ADE7932 and

ADE7923 devices are called VA2, VB2, VC2, and VN2 (see the

Second Voltage Channel and Temperature Measurement section).

Figure 54 shows the ADC and signal processing chain for Input VA

in the voltage channel (the path is the same for VB and VC).

The ADC outputs are signed twos complement 24-bit words

and are available at a rate of 8 kSPS.

With the specified full-scale analog input signal of ±0.5 V, the

ADC produces its maximum output code value. Figure 54 shows

a full-scale voltage signal applied to the differential inputs (V1P

and VM). The ADC output swings from −5,320,000 to +5,320,000.

Note that these are nominal values, and every ADE7978/ADE7933/

ADE7932/ADE7923 chipset varies around these values.

Input VN/VN2 between the V1P/V2P and VM pins,

respectively, of the neutral line. The ADE7923 can be used for

auxiliary voltage measurements, for example, measuring the

earth to neutral voltage of a 3-phase system. If no voltage is

monitored at the V1P or V2P pin, connect the V1P and V2P

pin to the VM pin. The datapath of these auxiliary voltages is

similar to the path of the phase voltages, as shown in Figure 55.

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