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ADF4252BCPZ-R7 数据表(PDF) 19 Page - Analog Devices

部件名 ADF4252BCPZ-R7
功能描述  Dual Fractional-N/Integer-N Frequency Synthesizer
PDF  30 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADF4252BCPZ-R7 数据表(HTML) 19 Page - Analog Devices

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Data Sheet
ADF4252
Rev. E | Page 19 of 30
P11
0
1
P12
0
XO ENABLED (REFOUT = REFIN)
1
XO DISABLED (REFOUT = LOGIC LOW)
(REFOUT = LOGIC HIGH WHEN IN POWER-DOWN)
P10
0
1
P9
0
1
0
0
0
0
LOGIC LOW
0
0
0
1
IF ANALOG LOCK DETECT
0
0
1
0
IF R DIVIDER OUTPUT
0
0
1
1
IF N DIVIDER OUTPUT
0
1
0
0
RF ANALOG LOCK DETECT
0
1
0
1
RF/IF ANALOG LOCK DETECT
0
1
1
0
IF DIGITAL LOCK DETECT
0
1
1
1
LOGIC HIGH
1
0
0
0
RF R DIVIDER OUTPUT
1
0
0
1
RF N DIVIDER OUTPUT
1
0
1
0
THREE-STATE OUTPUT
1
0
1
1
LOGIC LOW
1
1
0
0
RF DIGITAL LOCK DETECT
1
1
0
1
RF/IF DIGITAL LOCK DETECT
1
1
1
0
LOGIC HIGH
1
1
1
1
LOGIC LOW
MUXOUT
M1
M2
M3
M4
COUNTER RESET
DISABLED
ENABLED
CP THREE-STATE
DISABLED
THREE-STATE
POWER-DOWN
DISABLED
ENABLED
XO DISABLE
P9
P10
P11
P12
M1
M2
M3
M4
MUXOUT
CONTROL
BITS
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
C2 (1) C1 (1)
C3 (0)
Figure 38. Master Register Map



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