LTM4658EVPBF datasheet(6/26 Pages) AD

6 / 26 page

LTM4658

Rev. 0

For more information www.analog.com

PIN FUNCTIONS

GND (Pins A1, A2, B2, C2, D2, E1, E2): Power Ground

Pins for Both Input and Output Returns.

VIN (Pins A3, B3, C3): The VIN pins supply current to the

internal circuitry and topside power switch. All of the VIN

pins must be connected together with short, wide traces

and bypassed to PGND with low ESR capacitors located

as close as possible to the pins.

COMP (Pin A4): Current Control Threshold and Error

Amplifier Compensation Point of the Switching Mode

Regulator Channel. The current comparator’s trip thresh-

old is linearly proportional to this voltage. Tie the COMP

pins together for parallel operation. The device is internal

compensated.

RUN (Pin A5): Run Control Input of Each Switching Mode

Regulator Channel. Enables chip operation by tying RUN

above 0.4V. Tying it to GND shuts down the part.

SW (Pins B1, C1, D1): Switching Node Internal High

Current Path from MOSFET to Inductor. Connect with solid

cooper area or leave it floating.

FB (Pin B4): The negative input of the error amplifier for

the switching mode regulator. The LTM4658 regulates

the voltage between FB and AGND to 500mV. A resistor

divider connecting to VOUT sets the output voltage. In

PolyPhase® operation, tying the FB pins of the slave chan-

nels to VIN to disable the internal error amplifier. See the

Applications Information of Switching Regulator section

for details.

VOUT (Pins B5, C5, D5, E5): Power Output Pins of Each

Switching Mode Regulator. Apply output load between

these pins and GND pins. Recommend placing output

decoupling capacitance directly between these pins and

GND pins.

AGND (Pin C4): The AGND pin is the ground reference for

the internal analog circuitry, including the bandgap volt-

age reference. To achieve good load regulation, connect

the AGND pin to the negative terminal of the output capac-

itor (COUT) at the load. A drop in the high current power

ground return path will be compensated. All of the signal

components, such as the FB resistor dividers and soft-

start capacitor, should be referenced to the AGND node.

The AGND node carries very little current and, therefore,

can be a minimal size trace.

MODE/SYNC (Pin D3): The MODE/SYNC pin facilitates

multiphase operation and synchronization to an external

clock. Depending on the mode of operation, the MODE/

SYNC pin either accepts an input clock pulse or outputs

a clock pulse at its operating frequency. (see Multiphase

Operation in Applications Information). The MODE/SYNC

pin also programs the mode of operation: pulse-skipping

or forced continuous.

SSTT (Pin D4): Soft-Start, Tracking and Temperature

Monitor Pin. An internal 10μA current into an external

capacitor on the soft-start pin programs the output volt-

age ramp rate during start-up. When SSTT is below 0.5V,

the VFB pin voltage will track the SSTT pin voltage. When

SSTT is above 0.5V, the tracking function is disabled, the

internal reference resumes control of the error amplifier

and the SSTT pin servos to a voltage representative of

junction temperature. For a clean recovery from an output

short circuit condition, the SSTT pin is pulled down to

approximately 140mV above the VFB voltage and a new

soft-start cycle is initiated. During shutdown and fault

conditions, the SSTT pin is pulled to ground.

PGOOD (Pin E3): Output Power Good with Open-Drain

Logic of the Switching Mode Regulator Channel. PGOOD

is pulled to ground when the voltage on the FB pin is not

within −3%/10% of the internal 0.5V reference.

FREQ (Pin E4): The FREQ pin sets the oscillator frequency

with an external resistor to AGND or sets the phasing

for multiphase operation. (See Multiphase Operation in

Applications Information section).

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