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PI3VDP411LSR 数据表(PDF) 8 Page - Diodes Incorporated

部件名 PI3VDP411LSR
功能描述  Dual Mode DisplayPort??to DVI/HDMI??Electrical Bridge (Level Shifter)
PDF  10 Pages
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制造商  DIODES [Diodes Incorporated]
网页  http://www.diodes.com
标志 DIODES - Diodes Incorporated

PI3VDP411LSR 数据表(HTML) 8 Page - Diodes Incorporated

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www.pericom.com
PS9060A
08/23/11
PI3VDP411LSR
Dual Mode DisplayPort™ to DVI/HDMI™ Electrical Bridge (Level Shifter)
Table 2: Differential Output Characteristics for TMDS_OUT signals
Symbol
Parameter
Min
Typ
Max
Units Comments
VH
Single-ended high level
output voltage
VDD-10mV
VDD
VDD+10mV V
VDD is the DC termination volt-
age in the HDMI or DVI Sink.
VDD is nominally 3.3V
VL
Single-ended low level
output voltage
VDD-600mV VDD-500mV VDD-400mV V
The open-drain output pulls
down from VDD.
VSWING
Single ended output swing
voltage
425
500
600
mV
Swing down from TMDS termi-
nation voltage (3.3V ±10%)
IOFF
Single-ended current in
high-Z state
50
µA
Measured with TMDS outputs
pulled up to VDD Max _(3.6V)
through 50Ω resistors.
TSKEW-INTRA
Intra-pair differential
skew
30
ps
This differential skew budget is
in addition to the skew present-
ed between D+ and D- paired
input pins. HDMI revision 1.3
source allowable intrapair skew
is 0.15 Tbit.
TSKEW-INTER
Inter-pair lane-to-lane
output skew
100
ps
This lane-to-lane skew budget
is in addition to skew between
differential input pairs
TJIT
Jitter added to TMDS
signals
25
ps
Jitter budget for TMDS signals
as they pass through the level
shifter. 25ps = 0.056 Tbit at 2.25
Gb/s
TMDS output oscillation elimination
The inputs do not incorporate a squelch circuit. Therefore, we recommend the input to be externally biased to prevent output oscilla-
tion. Pericom recommends to add a 1.5Kohm pull-up to the CLK- input.
TMDS Input Fail-Safe Recommendation
1.5Kohm
RINT
VBIAS
RINT
DMDP
Receiver
TMDS
Driver
S
S
S
S
RT
RT
AVDD
3.3V
11-0084



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