71M6543HT datasheet(39/75 Pages) MAXIM

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TMUX[5:0]

SIGNAL NAME

DESCRIPTION

RTCLK

32.768 kHz clock waveform

WD_RST

Indicates when the MPU has reset the watchdog timer. Can be

monitored to determine spare time in the watchdog timer.

CKMPU

MPU clock

V3AOK bit

IndicatesthattheV3P3Apinvoltageis≥3.0V.TheV3P3Aand

V3P3SYS pins are expected to be tied together at the PCB level. The

71M6543 monitors the V3P3A pin voltage only.

V3OK bit

IndicatesthattheV3P3Apinvoltageis≥2.8V.TheV3P3Aand

V3P3SYS pins are expected to be tied together at the PCB level. The

71M654 monitors the V3P3A pin voltage only.

MUX_SYNC

Internal multiplexer frame SYNC signal.

CE_BUSY interrupt

CE_XFER interrupt

RTM output from CE

Note: All

TMUX[5:0] values that are not shown are reserved.

TMUX2[4:0]

SIGNAL NAME

DESCRIPTION

WD_OVF

Indicateswhenthewatchdogtimerhasexpired(overflowed).

PULSE_1S

One-second pulse with 25% duty cycle. This signal can be used to

measure the deviation of the RTC from an ideal 1-second interval.

Multiplecyclesshouldbeaveragedtogethertofilteroutjitter.

PULSE_4S

Four-second pulse with 25% duty cycle. This signal can be used to

measure the deviation of the RTC from an ideal 4-second interval.

Multiplecyclesshouldbeaveragedtogethertofilteroutjitter.Thispulse

provides a more precise measurement than the 1-second pulse.

RTCLK

32.768 kHz clock waveform

SPARE[1] bit – I/O RAM

0x2704[1]

Copies the value of the bit stored in 0x2704[1]. For general purpose

use.

SPARE[2] bit – I/O RAM

0x2704[2]

Copies the value of the bit stored in 0x2704[2]. For general purpose

use.

WAKE

Indicates when a WAKE event has occurred.

MUX_SYNC

Internal multiplexer frame SYNC signal.

MCK

GNDD

Digital GND. Use this signal to make the TMUX2OUT pin static.

Table 11. Test Ports

71M6543HT 数据表(PDF) 39 Page - Maxim Integrated Products

71M6543HT 数据表(HTML) 39 Page - Maxim Integrated Products

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