ADL6010

Data Sheet

Rev. E | Page 16 of 23

THEORY OF OPERATION

The ADL6010 uses eight Schottky diodes in a novel two path

detector topology. One path responds during the positive half

cycles of the input, and the second responds during the negative

half cycles of the input, thus achieving full wave rectification. This

arrangement presents a constant input impedance throughout

the full RF cycle, thereby preventing the reflection of even-

order distortion components back toward the source, which is a

well-known limitation of the widely used traditional single

Schottky diode detectors.

Eight diodes are arranged on the chip in such a way as to minimize

the effect of chip stresses and temperature variations. They are

biased by small keep alive currents chosen in a trade-off between

the inherently low sensitivity of a diode detector and the need to

preserve envelope bandwidth. Thus, the corner frequency of the

front-end low-pass filtering is a weak function of the input

level. At low input levels, the −3 dB corner frequency is at

approximately 0.5 GHz. The overall envelope bandwidth is

limited mainly by the subsequent linearizing and output

circuitry.

At small input levels, all Schottky diode detectors exhibit an

extremely weak response which approximates a square law

characteristic (having zero slope at the origin). For large inputs,

the response approaches a linear transfer function. In the

ADL6010, this nonlinearity and variations in the response are

corrected using proprietary circuitry having an equally shaped

but inverse amplitude function, resulting in an overall envelope

response that is linear across the whole span of input levels.

The composite signal is buffered and presented at the output

pin (VOUT). The transfer function relating the instantaneous

RF voltage amplitude to the quasi-dc output is a scalar constant

of a little over ×2. This scalar constant is mainly determined by

ratios of resistors, which are independent of temperature and

process variations. Errors associated with the minuscule voltages

generated by the Schottky front-end under low level conditions,

and other errors in the nonlinear signal processing circuitry, are

minimized by laser trimming, permitting accurate measurement

of RF input voltages down to the millivolts level. An aspect of

the ability of the output stage to reach down to absolute zero (the

potential on the COMM pin) when using a single positive supply.

DC voltages at the input are blocked by an on-chip capacitor.

The two ground pins (RFCM) on either side of RFIN (Pin 5)

form part of an RF coplanar waveguide (CPW) launch into

the detector. The RFCM pins must be connected to the signal

ground. Give careful attention to the design of the PCB in this

area.

The envelope voltage gain of the ADL6010 is nominally

3.2 V/V when the input signal is specified as the rms voltage of

a CW carrier. For example, a steady −30 dBm input generates a

dc output voltage of 22.5 mV, at which level the output buffer is

able to track the envelope. In fact, the sensitivity at ambient

temperatures typically extends below −30 dBm. However, over

the specified temperature range, the measurement error tends

to increase at the bottom of the specified range.

For large inputs, the voltage headroom in the signal processing

stages limits the measurement range. Using a 5 V supply, the

maximum signal is approximately 3.6 V p-p, corresponding to a

power of 15 dBm, referenced to 50 Ω. Therefore, the ADL6010

achieves a 45 dB dynamic range of high accuracy measurement.

Note that, above 43.5 GHz, accuracy is limited by the package,

PCB, and instrumentation. The RF input interface provides a

broadband (flat) 50 Ω termination without the need for

external components. Although the input return loss inevitably

degrades at very high frequencies, the slope of the transfer

voltage responding behavior of the ADL6010.