ADP2450ACPZ-5-R7 datasheet(22/40 Pages) AD

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ADP2450

Data Sheet

Rev. B | Page 22 of 40

THEORY OF OPERATION

The ADP2450 is a power management IC for circuit breaker

and CT powered supply applications. The ADP2450 integrates

one boost shunt controller with power detection, one high

efficiency buck regulator, four programmable gain amplifiers, one

low offset operation amplifier, a fast analog trip circuit, and an

actuator driver in a 32-lead LFCSP or 48-lead LQFP package. With

the high integration rate, the ADP2450 provides a compact, robust

power supply and signal conditioning solution for size limited,

high reliability systems.

BOOST SHUNT CONTROLLER

The ADP2450 integrates a boost shunt controller with a field-effect

transistor (FET) driver. The boost shunt controller uses a hysteresis

control scheme to regulate the output voltage. When the feedback

voltage on the FB1 pin is lower than the reference voltage (typically

1.2 V), the FET driver turns off the external FET, and then the

current from CT charges the output capacitor storing energy in

the capacitor. When the output voltage rises and the feedback

voltage on the FB1 pin is higher than the rising threshold

(typically 1.219 V), the FET driver turns on the external FET

and bypasses the CT current to ground through the external FET.

POWER DETECTION

The ADP2450 integrates an input power detection function.

During startup, when the voltage on the VPTH pin is lower

than the VPTH rising threshold (typically 1.22 V), the power

detection FET is turned on and the DET pin is pulled down to

ground. Both the 1 μA and 3.8 μA internal current sources are

added between VPTH and ground. When the voltage on the

VPTH pin rises above the VPTH rising threshold (typical 1.22 V),

the power detection FET is turned off and the DET pin is open.

The 3.8 μA current source is removed and only the 1 μA current

source is added.

When the voltage on the VPTH pin falls below the VPTH

falling threshold (typically 1.09 V), the power detection FET is

turned on again, which pulls the DET pin to ground, and the

3.8 μA current source is added between VPTH and ground again.

The voltage threshold and hysteresis for power detection is

programmable with external resistors on the VPTH pin, as

shown in Figure 65.

VPTH

RTOP_VP

RBOT_VP

ADP2450

1.22V

CMP

1µA

3.8µA

VOUT1

Figure 65. Programmable Voltage of Power Detection

Use the following equation to calculate RTOP_VP and RBOT_VP:

1.09 V

1.22 V

1.09 V 4.8 A 1.22 V 1 A

OUT1 RISING

OUT1 FALLING

TOP VP







 

 

1.22 V

4.8 A 1.22 V

TOP VP

BOT VP

OUT1 RISING

TOP VP







 

where:

RTOP_VP

is the top side resistor connected between the VOUT1 and

VPTH pin.

RBOT_VP

is the bottom side resistor connected between the

VPTH pin and ground.

VOUT1_RISING

is the VOUT1 rising threshold.

VOUT1_FALLING

is the VOUT1 falling threshold.

A dummy resistor load (RPOWER) connected between VOUT1 and

the DET pin ensures that the whole system is not enabled until

there is enough power provided to the system by the current

transformer, as shown in Figure 66.

RPOWER

VOUT1

ADP2450

DET

GND

Figure 66. Dummy Load Connection

Calculate the dummy load resistor value using the following

equation:

OUT1_RISING

POWER

DUMMY



where IDUMMY is the minimum required current value before

enabling the system.

Ensure that the selected dummy load resistor can handle the

power before the DET pin is open. The power consumption

on the dummy load resistor (PDUMMY) is calculated using the

following equation:

DUMMY

POWER



INTERNAL REGULATOR

The internal 5 V regulator (VREG) provides a stable voltage

supply for the internal control circuits. It is recommended to

place a 1 μF ceramic capacitor between VREG and GND. The

internal regulator also includes a current-limit circuit for over-

current protection.

The internal 8 V regulator provides the voltage supply for the

boost shunt driver.

The VIN pin provides power supply for both the 5 V and 8 V

internal regulators.

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