USB7002SLASHKDX datasheet(7/56 Pages) MICROCHIP

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DS00002670G-page 7

USB7002

VariSense, which controls the Hi-Speed USB receiver sensitivity enabling programmable levels of USB signal receive

sensitivity. This capability allows operation in a sub-optimal system environment, such as when a captive USB cable is

used.

The USB7002 can be configured for operation through internal default settings. Custom OEM configurations are sup-

ported through external SPI ROM or internal OTP ROM. All port control signal pins are under firmware control in order

to allow for maximum operational flexibility and are available as GPIOs for customer specific use.

The USB7002 is available in commercial (0°C to +70°C) and industrial (-40°C to +85°C) temperature ranges. An internal

block diagram of the USB7002 in an upstream Type-C application is shown in Figure 2-1.

FIGURE 2-1:

USB7002 INTERNAL BLOCK DIAGRAM - UPSTREAM TYPE-C APPLICATION

Hub Controller Logic

I2C/SMB

2C from Master

25 Mhz

USB3 USB2

USB7002

PHY0

+3.3 V

+1.2 V

PHY4

PHY2

PHY1

PHY2

PHY1

PHY3

PHY4

PHY3

Hub Feature Controller

GPIO SMB

OTP

SPI

HFC

PHY

I2S

UART

PHY5

PHY0

Mux

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