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USB7002/KDX 数据表(PDF) 14 Page - Microchip Technology |
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USB7002/KDX 数据表(HTML) 14 Page - Microchip Technology |
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14 / 56 page  USB7002 DS00002670G-page 14 2022 Microchip Technology Inc. and its subsidiaries Test TESTEN I/O12 Test pin. This signal is used for test purposes and must always be connected to ground. Analog Test ATEST A Analog test pin. This signal is used for test purposes and must either be left unconnected or tied to ground. External 25 MHz Crystal Input XTALI ICLK External 25 MHz crystal input External 25 MHz Reference Clock Input CLKIN ICLK External reference clock input. The device may alternatively be driven by a single- ended clock oscillator. When this method is used, XTALO should be left unconnected. External 25 MHz Crystal Output XTALO OCLK External 25 MHz crystal output Configuration Straps Port 4-1 D+ Disable Configuration Strap PRT_DIS_P[4:1] I Port 4-1 D+ Disable Configuration Strap. These configuration straps are used in conjunction with the corresponding PRT_DIS_M[4:1] straps to disable the related port (4-1). See Note 3-1. Both USB data pins for the corresponding port must be tied to 3.3V to disable the associated downstream port. Port 4-1 D- Disable Configuration Strap PRT_DIS_M[4:1] I Port 4-1 D- Disable Configuration Strap. These configuration straps are used in conjunction with the corresponding PRT_DIS_P[4:1] straps to disable the related port (4-1). See Note 3-1. Both USB data pins for the corresponding port must be tied to 3.3V to disable the associated downstream port. Non-Removable Ports Configuration Strap CFG_NON_REM I Non-Removable Ports Configuration Strap. This configuration strap controls the number of reported non-removable ports. See Note 3-1. Battery Charging Configuration Strap CFG_BC_EN I/O12 Battery Charging Configuration Strap. This configuration strap controls the number of BC 1.2 enabled downstream ports. See Note 3-1. Device Mode Configuration Straps 3-1 CFG_STRAP[3:1] I Device Mode Configuration Straps 3-1. These configuration straps are used to select the device’s mode of operation. See Note 3-1. TABLE 3-1: PIN DESCRIPTIONS (CONTINUED) Name Symbol Buffer Type Description |
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