SML2120 datasheet(8/32 Pages) SUMMIT

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SML2120

Summit Microelectronics

2066 6.3 1/22/04

(Over recommended operating conditions, unless otherwise noted. All voltages are relative to VSS.)

Symbol

Description

Conditions

Min

Typ

Max

Unit

8-bit Current DAC Accuracy (When configured to sink current to VSS, VILU=1V)

Resolution

bits

INL

Relative accuracy

Note 1, 10% to 90% of current scale

1. Low Range DAC at lowest value; High Range DAC at highest value.

-3

LSB

Note 2, 10% to 90% of current scale

2. Any Combination of DAC settings.

-7

LSB

DNL

Differential nonlinearity

-1

LSB

Gain

Positive full scale gain error

-2

Offset

Offset error

Note 1

-4

LSB

Note 2

-10

+10

LSB

IZSE3

3. IZSE and IFSE not adjusted for Gain and Offset.

Zero-scale error current

VDD=5.5V, Note 1

025

µA

VDD=5.5V, Note 2

050

µA

VDD=3.135V, Note 2

165

µA

IFSE3

Full-scale error current

-150

+150

µA

8-bit Current DAC Accuracy (When configured to source current from VDD, VILU=1V)

Resolution

bits

INL

Relative accuracy

10% to 90% of current scale

-7

LSB

DNL

Differential nonlinearity

-1

LSB

Gain

Positive full scale gain error

-2

Offset

Offset error

-12

+12

LSB

IZSE3

Zero-scale error current

VDD=5.5V, Note 1

-30

µA

VDD=5.5V, Note 2

-50

µA

VDD=3.135V, Note 2

165

µA

IFSE3

Full-scale error current

-220

+220

µA

DAC OPERATING CHARACTERISTICS

DAC Operating Characteristics

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