ADN4621 datasheet(3/24 Pages) AD

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Data Sheet

ADN4620/ADN4621

SPECIFICATIONS

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Rev. 0 | 3 of 24

For all minimum and maximum specifications, VDD1 = 1.7 V to 1.9 V, VDD2 = 1.7 V to 1.9 V, VIO1 = 3 V to 3.6 V, VIO2 = 3 V to 3.6 V and TA

= −40°C to +125°C, unless otherwise noted. For all typical specifications, VDD1 = VDD2 = 1.8 V, VIO1 = VIO2 = 3.3 V, and TA = 25°C. For all

specifications, REFRESH1 = GND1 and REFRESH2 = GND2, unless otherwise noted.

Table 1.

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions/Comments

INPUTS (RECEIVERS)

Input Threshold

See Figure 33 and Table 2

High

VTH

100

Low

VTL

−100

Differential Input Voltage

|VID|

100

See Figure 33 and Table 2

Input Common-Mode Voltage

VIC

0.5|VID|

2.4 − 0.5|VID|

See Figure 33 and Table 2

Input Current, High and Low

IIH, IIL

−5

µA

DINx± = 2.4 V or 0 V, other input = 1.2 V, VDDx = 1.8 V or 0 V

Differential Input Capacitance1

CINx±

1.7

One DINx± = 0.4 sin(30 × 106πt) V + 0.5 V, other DINx± = 1.2 V2

LOGIC INPUTS

VDDx = VDD1 for REFRESH1, VDDx = VDD2 for REFRESH2

Input High Voltage

VINH

0.65 VDDx

Input Low Voltage

VINL

0.35 VDDx

Input Current High

|IINH|

μA

REFRESHx = VDDx

μA

REFRESHx = 1.9 V, VDDx = 0 V

Input Current Low

|IINL|

μA

REFRESHx = 0 V

OUTPUTS (DRIVERS)

Differential Output Voltage

|VOD|

250

310

450

See Figure 31 and Figure 32, load resistance (RL) = 100 Ω

VOD Magnitude Change

Δ|VOD|

See Figure 31 and Figure 32, RL = 100 Ω

Offset Voltage

VOS

1.125

1.17

1.375

See Figure 31, RL = 100 Ω

VOS Magnitude Change

ΔVOS

See Figure 31, RL = 100 Ω

VOS, Peak-to-Peak1

VOS(p-p)

150

See Figure 31, RL = 100 Ω

Output Short-Circuit Current

IOS

−20

DOUTx± = 0 V

|VOD| = 0 V

Differential Output Capacitance1

COUTx±

One DOUTx± = 0.4 sin(30 × 106πt) V + 0.5 V, other DOUTx± = 1.2

V, VDD1 or VDD2 = 0 V

ADN4620 SUPPLY CURRENT

All channels, 100 Ω across inputs DINx±, |VID| = 200 mV

Supply Current Side 1

IDD1

Frequency (f) = 1.25 GHz

Supply Current Side 2

IDD2

f = 1.25 GHz, RL = 100 Ω

f = 1.25 GHz, RL = 100 Ω, REFRESH2 = VDD2

VIO1 Supply

IIO1

f = 1.25 GHz

ADN4621 SUPPLY CURRENT

All channels, 100 Ω across inputs DINx±, |VID| = 200 mV

Supply Current Side 1 or Side 2

IDD1 or IDD2

VDDx = VDD1 for REFRESH1, VDDx = VDD2 for REFRESH2

f = 1.25 GHz, RL = 100 Ω

f = 1.25 GHz, RL = 100 Ω, REFRESHx = VDDx

VIO1 or VIO2 Supply

IIO1 or IIO2

5.5

f = 1.25 GHz

COMMON-MODE TRANSIENT

IMMUNITY3

|CM|

kV/µs

Common-mode voltage (VCM) = 1000 V, transient magnitude =

800 V

1 These specifications are guaranteed by design and characterization.

2 t denotes time.

3 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining any DOUTx+ or DOUTx− pin in the same state as the corresponding DINx+

or DINx− pin (no change in output) or producing the expected transition on any DOUTx+ or DOUTx− pin if the applied common-mode transient edge is coincident with a data

transition on the corresponding DINx+ or DINx− pin. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.

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