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SWCS049C 数据表(PDF) 37 Page - Texas Instruments |
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SWCS049C 数据表(HTML) 37 Page - Texas Instruments |
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37 / 144 page  SWCS049-004 PWRHOLD VIO LDO5 VDD2 VDD1 LDO4 LDO3 LDO8 LDO6 CLK32KOUT NRESPWRON t pd2 t dsON1 t dsON2 t dsON3 t dsON4 t dsON5 t dsON6 t dsON16 t pd1 Switch-off sequence t : Switch-on sequence ond NRESPWRON2 t dsON15 i 37 TPS65911 www.ti.com SWCS049S – JUNE 2010 – REVISED AUGUST 2018 Submit Documentation Feedback Product Folder Links: TPS65911 Specifications Copyright © 2010–2018, Texas Instruments Incorporated 5.21.2 Switch-ON and Switch-OFF Sequences and Timing This section describes an example boot sequence. Each TPS65911x device supports a dedicated EEPROM boot sequence to match specific processor requirements. Fixed boot mode is the same in all TPS65911x devices. Boot mode selection is described in Section 6.5.2. NOTE: Figure 5-1 is for illustrative purposes only and does not describe any actual TPS65911x part number. Figure 5-1. Boot Sequence Example With 2-ms Time Slot and Simultaneous Switch-Off of Resources Table 5-3. Switching Characteristics for Boot Sequence Example PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tdsON1 PWRHOLD rising edge to VIO LDO5 enable delay 66 × tCK32k = 2060 µs tdsON2 VIO to VDD2 enable delay 64 × tCK32k = 2000 µs tdsON3 VDD2 to VDD1 enable delay 64 × tCK32k = 2000 µs tdsON4 VDD1 to LDO4 enable delay 64 × tCK32k = 2000 µs tdsON5 LDO4 to LDO3, LDO8 enable delay 64 × tCK32k = 2000 µs tdsON6 LDO3 to LDO6 enable delay 64 × tCK32k = 2000 µs tdsON7 LDO6 to CLK32KOUT rising-edge delay 9 × 64 × tCK32k = 18000 µs tdsON16 CLK32KOUT to NRESPWON NRESPWON2 rising-edge delay 64 × tCK32k = 2000 µs tdsONT Total switch-on delay 32 ms tpd1 PWRHOLD falling edge to NRESPWON NRESPWON2 falling-edge delay 2 × tCK32k = 62.5 µs |
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