ADP5585ACPZ-01-R7 datasheet(33/40 Pages) AD

33 / 40 page

Data Sheet

ADP5585

Rev. C | Page 33 of 40

LOGIC_CFG Register 0x34

Table 60. LOGIC_CFG Bit Descriptions

Bit(s)

Bit Name

Access

Description

N/A

Reserved.

LY_INV

Read/write

0 = LY output not inverted before passing into logic block.

1 = inverts output LY from the logic block.

LC_INV

Read/write

0 = LC input not inverted before passing into the logic block.

1 = inverts input LC before passing it into the logic block.

LB_INV

R/W

0 = LB input not inverted before passing into the logic block.

1 = inverts input LB before passing it into the logic block.

LA_INV

R/W

0 = LA input not inverted before passing into the logic block.

1 = inverts input LA before passing it into the logic block.

2 to 0

LOGIC_SEL[2:0]

R/W

Configures the digital mux for the logic block. Refer to Figure 19.

000 = off/disable.

001 = AND.

010 = OR.

011 = XOR.

100 = FF.

101 = IN_LA.

110 = IN_LB.

111 = IN_LC.

LOGIC_FF_CFG Register 0x35

Table 61. LOGIC_FF_CFG Bit Descriptions

Bit(s)

Bit Name

Access

Description

7 to 2

N/A

Read/write

Reserved.

FF_SET

Read/write

0 = FF not set in the logic block. Refer to Figure 19.

1 = set FF in the logic block.

FF_CLR

Read/write

0 = FF not cleared in the logic block. Refer to Figure 19.

1 = clear FF in the logic block.

LOGIC_INT_EVENT_EN Register 0x36

Table 62. LOGIC_INT_EVENT_EN Bit Descriptions

Bit(s)

Bit Name

Access

Description

7 to 3

N/A

Reserved.

LY_DBNC_DIS

Read/write

0 = output of the logic block is debounced before entering the event/interrupt block.

1 = output of the logic block is not debounced before entering the event/interrupt

block. Use with caution because glitches may generate interrupts prematurely.

LOGIC_EVENT_EN

Read/write

0 = LY cannot generate interrupt.

1 = allow LY activity to generate events on the FIFO.

LOGIC_INT_LEVEL

Read/write

Configure the logic level of LY that generates an interrupt.

0 = LY is active low.

1 = LY is active high.

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