F1350 datasheet(20/27 Pages) RENESAS

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DPD Demodulator for PA

Linearization, 1300MHz to 2900MHz

IDTF1350

Datasheet

IDT Zero-DistortionTM, Glitch-FreeTM DPD Receiver

January 21, 2020

PIN DESCRIPTIONS

Pins

Name

Function

SW_LATCH

Stand-by latch. Pull Low or Ground for Normal Operation. If left

floating, this input will be internally pulled high, disabling SPI

writes to ENb (Standby) and RF SW bits (A0, A2).

2, 4, 5, 6, 8,

11,15, 21, 22,

30, 31, 32, 33,

34, 36

GND

Ground these Pins.

RF_INY

Alternate RF Input. Separated from RF_INX by internal SP2T.

AC couple to this pin. Internally matched to 50 ohms

9, 16, 25

VCC

Power Supply. Bypass to GND with capacitors shown in the

Typical Application Circuit as close as possible to pin.

LO_ADJ

Connect the specified resistor from this pin to ground to set the

LO path ICC. This IS a current setting resistor

LO_IN

LO Input. AC couple to this pin. Internally matched to 50 ohms

7,13, 29

N.C.

No Connection. Not internally connected. OK to connect to Vcc.

Recommended Connection is Ground

STBY

STBY Mode. Pull this pin high for Standby mode (30mA). Pull

low or Ground for normal Operation

17, 18

IF_BIAS_I

IF_BIAS_Q

Connect the specified resistor from this pin to ground to set the

IF amplifier bias reference. This is NOT a current setting resistor

19, 20

IF_I+, IF_I-

In-Phase Mixer Differential IF Output. Connect pullup inductors

from each of these pins to VCC (see the Typical Application

Circuit).

23, 24

IF_Q-, IF_Q+

Quadrature Mixer Differential IF Output. Connect pullup

inductors from each of these pins to VCC (see the Typical

Application Circuit).

CSb

Chip Select Bar. The falling edge initiates a programming cycle

and the rising edge latches the programmed shift register data

into the active register.

DATA

Serial Data Input

CLK

Serial Clock Input

RF_INX

Main RF Input. Separated from RF_INY by internal SP2T. AC

couple to this pin. Internally matched to 50 ohms

— EP

Exposed Pad. Internally connected to GND. Solder this exposed

pad to a PCB pad that uses multiple ground vias to provide heat

transfer out of the device into the PCB ground planes. These

multiple via grounds are also required to achieve the noted RF

performance.

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