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AM6421...ALV 数据表(PDF) 36 Page - Texas Instruments

部件名 AM6421...ALV
功能描述  AM64x Sitara™ Processors
PDF  244 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

AM6421...ALV 数据表(HTML) 36 Page - Texas Instruments

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Table 6-1. Pin Attributes (ALV Package) (continued)
BALL
NUMBER [1]
BALL NAME [2]
PADCONFIG Register [15]
PADCONFIG Address [16]
SIGNAL NAME [3]
MUX
MODE
[4]
TYPE
[5]
DSIS
[6]
BALL
STATE
DURING
RESET
RX/TX/PULL [7]
BALL
STATE
AFTER
RESET
RX/TX/PULL [8]
MUX
MODE
AFTER
RESET
[9]
I/O
OPERATING
VOLTAGE [10]
POWER [11]
HYS
[12]
BUFFER
TYPE [13]
PULL
UP/DOWN
TYPE [14]
T3
PRG0_PRU0_GPO6
PADCONFIG:
PADCONFIG94
0x000F4178
PRG0_PRU0_GPO6
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV1
Yes
LVCMOS
PU/PD
PRG0_PRU0_GPI6
1
I
0
PRG0_RGMII1_RXC
2
I
0
PRG0_PWM3_A1
3
IO
0
GPIO1_6
7
IO
pad
UART4_CTSn
10
I
1
T1
PRG0_PRU0_GPO7
PADCONFIG:
PADCONFIG95
0x000F417C
PRG0_PRU0_GPO7
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV1
Yes
LVCMOS
PU/PD
PRG0_PRU0_GPI7
1
I
0
PRG0_IEP0_EDC_LATCH_IN1
2
I
0
PRG0_PWM3_B1
3
IO
1
CPTS0_HW2TSPUSH
4
I
0
CP_GEMAC_CPTS0_HW2TSPUSH
5
I
0
TIMER_IO6
6
IO
0
GPIO1_7
7
IO
pad
UART4_TXD
10
O
T2
PRG0_PRU0_GPO8
PADCONFIG:
PADCONFIG96
0x000F4180
PRG0_PRU0_GPO8
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV1
Yes
LVCMOS
PU/PD
PRG0_PRU0_GPI8
1
I
0
PRG0_PWM2_A1
3
IO
0
GPIO1_8
7
IO
pad
GPMC0_A2
9
OZ
UART4_RTSn
10
O
W6
PRG0_PRU0_GPO9
PADCONFIG:
PADCONFIG97
0x000F4184
PRG0_PRU0_GPO9
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV1
Yes
LVCMOS
PU/PD
PRG0_PRU0_GPI9
1
I
0
PRG0_UART0_CTSn
2
I
1
PRG0_PWM3_TZ_IN
3
I
0
RGMII1_RX_CTL
4
I
0
RMII1_RX_ER
5
I
0
PRG0_IEP0_EDIO_DATA_IN_OUT28
6
IO
0
GPIO1_9
7
IO
pad
UART2_RXD
10
I
1
AM6442, AM6441, AM6421, AM6412, AM6411
SPRSP56D – JANUARY 2021 – REVISED JULY 2022
www.ti.com
36
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Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411



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