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MPFS250TLS 数据表(PDF) 89 Page - Microchip Technology |
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MPFS250TLS 数据表(HTML) 89 Page - Microchip Technology |
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89 / 128 page ![]() Table 95 • PCI Express Gen2 Unit Max Min Data Rate Parameter UI 0.35 5.0 Gbps Total transmit jitter UI 0.4 5.0 Gbps Receiver jitter tolerance Note: With add-in card as specified in PCI Express CEM Rev 2.0. 6.6.2 Interlaken The following table describes Interlaken. Table 96 • Interlaken Unit Max Min Data Rate Parameter UI 0.3 6.375 Gbps Total transmit jitter UI 0.3 10.3125 Gbps UI 0.3 12.7 Gbps 1 UI 0.6 6.375 Gbps Receiver jitter tolerance UI 0.65 10.3125 Gbps UI 0.65 12.7 Gbps 1 1. For data rates greater than 10.3125 Gbps, VDDA must be set to 1.05 V mode. See supply tolerance in the section Recommended Operating Conditions. 6.6.3 10GbE (10GBASE-R and 10GBASE-KR) The following table describes 10GbE (10GBASE-R). Table 97 • 10GbE (10GBASE-R) Unit Max Min Data Rate Parameter UI 0.28 10.3125 Gbps Total transmit jitter UI 0.7 10.3125 Gbps Receiver jitter tolerance The following table describes 10GbE (10GBASE-KR). Table 98 • 10GbE (10GBASE-KR) Unit Max Min Data Rate Parameter UI 0.28 10.3125 Gbps Total transmit jitter UI 0.115 10.3125 Gbps Receiver jitter tolerance (SJ) UI 0.13 10.3125 Gbps Receiver jitter tolerance (RJ) 85 Microsemi Proprietary and Confidential. DS0147 Revision 1.0 AC Switching Characteristics |
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