List of figures

Figure 1.

Block diagram .................................................................... 2

Figure 2.

Pin connection (top view) ............................................................. 3

Figure 3.

Power supply configuration for unipolar and bipolar gate driving .................................. 8

Figure 4.

Standby state sequences............................................................ 10

Figure 5.

Half-bridge configuration ............................................................ 11

Figure 6.

Half-bridge configuration with negative gate driving .......................................... 11

Figure 7.

Suggested PCB layout for half-bridge configuration with negative driving voltage ..................... 12

Figure 8.

Timings definition ................................................................. 13

Figure 9.

CMTI test circuit .................................................................. 13

Figure 10.

SO-16 package outline ............................................................. 15

Figure 11.

SO-16 suggested land pattern ........................................................ 16

STGAP2D

List of figures

DS12746 - Rev 3

page 21/22