TLF5106

January 1988

MM54HC74AMM74HC74A

Dual D Flip-Flop with Preset and Clear

General Description

The MM54HC74AMM74HC74A utilizes advanced silicon-

gate CMOS technology to achieve operating speeds similar

to the equivalent LS-TTL part It possesses the high noise

immunity and low power consumption of standard CMOS

integrated circuits along with the ability to drive 10 LS-TTL

loads

This flip-flop has independent data preset clear and clock

inputs and Q and Q outputs The logic level present at the

data input is transferred to the output during the positive-go-

ing transition of the clock pulse Preset and clear are inde-

pendent of the clock and accomplished by a low level at the

appropriate input

The 54HC74HC logic family is functionally and pinout com-

patible with the standard 54LS74LS logic family All inputs

are protected from damage due to static discharge by inter-

Features

Y

Typical propagation delay 20 ns

Y

Wide power supply range 2 – 6V

Y

Low quiescent current 40 mA maximum (74HC Series)

Y

Low input current 1 mA maximum

Y

Fanout of 10 LS-TTL loads

Connection and Logic Diagrams

Dual-In-Line Package

TLF5106 – 1

Order Number MM54HC74A or MM74HC74A

Truth Table

Inputs

Outputs

PR

CLR

CLK

D

Q

Q

LH

X

X

H

L

HL

X

X

L

H

LL

X

X

H

H

HH

u

HH

L

HH

u

LL

H

H

H

L

X

Q0

Q0

Note

tions were established

This configuration is nonstable that is it will not persist

when preset and clear inputs return to their inactive (high)

level

TLF5106 – 2

C1995 National Semiconductor Corporation

RRD-B30M105Printed in U S A