STA320

10/37

For example, SAI=1110 and SAIFB=1 would specify Right-Justified 16-bit data, LSB-First.

Table 4 below lists the serial audio input formats supported by STA320 as related to BICKI = 32/48/64fs, where

sampling rate fs = 32/44.1/48/88.2/96kHz.

5.2.3 Delay Serial Clock Enable

Table 12. Supported Serial Audio Input Formats

BICKI

SAI (3...0)

SAIFB

Interface Format

32fs

1100

X

1110

X

Left/Right-Justified 16bit Data

48fs

0100

X

0100

X

1000

X

0100

0

1100

1

0001

X

Left-Justified 24bit Data

0101

X

Left-Justified 20bit Data

1001

X

Left-Justified 18bit Data

1101

X

Left-Justified 16bit Data

0010

X

Right-Justified 24bit Data

0110

X

Right-Justified 20bit Data

1010

X

Right-Justified 18bit Data

1110

X

Right-Justified 16bit Data

64fs

0000

X

0100

X

1000

X

0000

0

1100

1

0001

X

Left-Justified 24bit Data

0101

X

Left-Justified 20bit Data

1001

X

Left-Justified 18bit Data

1101

X

Left-Justified 16bit Data

0010

X

Right-Justified 24bit Data

0110

X

Right-Justified 20bit Data

1010

X

Right-Justified 18bit Data

1110

X

Right-Justified 16bit Data

BIT

R/W

RST

NAME

DESCRIPTION

5

R/W

0

DSCKE

Delay Serial Clock Enable:

0 – No serial clock delay

1 – Serial clock delay by 1 core clock cycle to tolerate anomalies