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LIS3DHH

Register description

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7

Register description

The device contains a set of registers which are used to control its behavior and to retrieve

linear acceleration and temperature data. The register addresses, consisting of 7 bits, are

used to identify them and to write the data through the serial interface.

7.1

WHO_AM_I (0Fh)

Device identification register.

7.2

CTRL_REG1 (20h)

Control register 1.

Table 9. WHO_AM_I register

00010001

Table 10. CTRL_REG1 register

NORM_

MOD_EN

IF_ADD_

INC

0(1)

1. These bits must be set to ‘0’ for the correct operation of the device.

0(1)

BOOT

SW_RESET

DRDY_

PULSE

BDU

Table 11. CTRL_REG1 register description

NORM_-

MOD_EN

Normal mode enable. Default value: 0

(0: power down; 1: enabled)

IF_ADD_INC

Register address automatically incremented during a multiple byte access with

SPI serial interface. Default value: 1

(0: disabled; 1: enabled)

BOOT

Reboot memory content. Default value: 0

(0: normal mode; 1: reboot memory content(1))

1. Boot request is executed as soon as the internal oscillator is turned on. It is possible to set the bit while in

power-down mode, in this case it will be served at the next normal mode.

SW_RESET

Software reset. Default value: 0

With SW_RESET the values in the writable CTRL registers are changed to the

default values.

(0: normal mode; 1: reset device)

This bit is cleared by hardware at the end of the operation.

DRDY_PULSE

Data ready on INT1 pin. Default value: 0

(0: DRDY latched; 1: DRDY pulsed, pulse duration is 1/4 ODR)

BDU

Block Data Update. Default value: 0

(0: continuous update; 1: output registers not updated until MSB and LSB read)