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STR485E 数据表(PDF) 5 Page - STMicroelectronics |
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STR485E 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 26 page ![]() Figure 5. Example of typical application B B B B A A A A GND GND GND GND VCC VCC VCC VCC D D D D DE DE DE DE R R R R RE RE RE RE VL VL VL VL SLR SLR SLR SLR RT 120Ω RT 120Ω Table 2. Driver truth table INPUT D ENABLE DE OUTPUT A OUTPUT B Function H H H L Actively drive bus high L H L H Actively drive bus low X L Z Z Driver disabled X Open Z Z Driver disabled by default Open H H L Actively drive bus high by default Table 3. Receiver truth table Differential input VID = VA -VB ENABLE RE OUTPUT R Function VID > VIT+ L H Receive valid bus high VIT- < VID < VIT+ L ? Indeterminate bus state VID < VIT- L L Receive valid bus low X H Z Receiver disabled X OPEN Z Receiver disabled by default Open-circuit bus L H Fail safe high output Short-circuit bus L H Fail safe high output Idle (terminated) bus L H Fail safe high output Table 4. Speed selection, SLR pin configuration SLR Data rate Typical tr / tf VL 250 kbps 200 ns GND or OPEN 20 Mbps 7 ns STR485E Truth tables DS13051 - Rev 3 page 5/26 |
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