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AM6546ACD 数据表(PDF) 178 Page - Texas Instruments |
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AM6546ACD 数据表(HTML) 178 Page - Texas Instruments |
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178 / 284 page  Note The general-purpose input/output i (i = 0 to 1) is also referred to as GPIOi. Table 7-38 presents timing conditions of the GPIO interface. Table 7-38. GPIO Timing Conditions PARAMETER DESCRIPTION MIN MAX UNIT INPUT CONDITIONS SRI Input slew rate 0.75 6.6 V/ns OUTPUT CONDITIONS CL Output load capacitance 3 10 pF Section 7.9.5.9.1 and Section 7.9.5.9.2 present timings and switching characteristics of the GPIO Interface. 7.9.5.9.1 GPIO Timing Requirements NO. PARAMETER DESCRIPTION MIN MAX UNIT GP2 tw(GPIO_IN) Minimum Input Pulse Width 3.6 + 2P(1) ns (1) P = functional clock period in ns. 7.9.5.9.2 GPIO Switching Characteristics NO. PARAMETER DESCRIPTION MIN MAX UNIT GP1 tw(GPIO_OUT) Minimum Output Pulse Width -4.6 + 0.975P(1) ns (1) P = functional clock period in ns. For more information, see section General-Purpose Interface (GPIO) in the device TRM. 7.9.5.10 GPMC For more details about features and additional description information on the device General-Purpose Memory Controller, see the corresponding sections within Section 6.3, Signal Descriptions and Section 8, Detailed Description. Table 7-39 presents the timing conditions for GPMC. Table 7-39. GPMC Timing Conditions PARAMETER DESCRIPTION MIN MAX UNIT Input Conditions SRI Input slew rate 1.65 4 V/ns Output Conditions CL Output load capacitance 5 20 pF 7.9.5.10.1 GPMC and NOR Flash—Synchronous Mode Section 7.9.5.10.1.1 and Section 7.9.5.10.1.2 assume testing over the recommended operating conditions and electrical characteristic conditions below (see Figure 7-48 through Figure 7-52). AM6548, AM6528, AM6546, AM6526 SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021 www.ti.com 178 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: AM6548 AM6528 AM6546 AM6526 |
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