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AM6546 数据表(PDF) 5 Page - Texas Instruments |
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AM6546 数据表(HTML) 5 Page - Texas Instruments |
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5 / 284 page  3.1 Functional Block Diagram Figure 3-1 is functional block diagram for the device. Industrial Subsystem DMSC 3x PRU_ICSSG (up to 6x Ethernet Ports) (C) Navigator Subsystem UDMA RA Proxy 2x PVU MCRC Spinlock 3x INTA INTR CPTS 12x Mailbox 2x TIMER-MGR Channelized FW GPMC ELM EMIF with ECC Memory Subsystem 2MB SRAM with ECC MSMC Display Subsystem 2x Video pipeline Blend/Scale/CSC Open LDI MIPI DPI System Services PDMA 4x RTI/WWDT 12x GP Timers Debug Video Input LVDSRX MIPI CSI-2 CAL BT.656/1120 Security Accelerators AES MD5 SHA 3DES PKA DRBG ESM Navigator Subsystem Channelized FW MCRC RA INTR UDMA INTA Proxy PDMA ESM Scratchpad RAM 512B 4x GP Timers 2x RTI/WWDT MCU-MSRAM 512KB MCU Island Interconnect Automotive Interfaces Control Interfaces Audio Peripherals Media and Data Storage General Connectivity High-Speed Serial Interfaces 2x MCAN-FD 2x MMCSD 3x MCASP 3x EQEP 1x ECAP 6x EHRPWM 1x I2C 5x I2C 2x OSPI or 1xQSPI + 1x HyperBus GPIO 5x MCSPI 3x MCSPI 2x ADC 4x UART 1x UART 10/100/1000 Ethernet 1x USB 3.1 DRD 1x USB 2.0 DRD PCIe 2x Single/1x Dual lane Gen 2 (A) (A) (A) (A) (A) (A)(B) (A) (B) (C) (C) A 654x / AM652x M ® intro_001 (with optional Lockstep) 2x Arm® Cortex -R5F ® 512KB L2 with ECC 2x Arm® Cortex -A53 ® 512KB L2 with ECC 2x Arm® Cortex -A53 ® 512KB L2 with ECC 2x Arm® Cortex -A53 ® GPU PowerVR SGX544-MP1 3D ® A. This interface is located on the MCU Island but is available for the full system to access. B. One port is internally connected only; not connected to any pins. C. SGMII, USB3.1 and PCIe share a total of two SerDes lanes. Figure 3-1. AM654x, AM652x Block Diagram www.ti.com AM6548, AM6528, AM6546, AM6526 SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: AM6548 AM6528 AM6546 AM6526 |
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