AM6546 datasheet(2/284 Pages) TI

2 / 284 page

– Support for takeover protection, IP protection,

and anti-roll back protection

• Cryptographic acceleration supported

– Session-aware cryptographic engine with ability

to auto-switch key-material based on incoming

data stream

– Supports cryptographic cores

• AES – 128/192/256 bits key sizes

• 3DES – 56/112/168 bits key sizes

• MD5, SHA1

• SHA2 – 224/256/384/512

• DRBG with true random number generator

• PKA (public key accelerator) to assist in

RSA/ECC processing

– DMA support

• Debugging security

– Secure software-controlled debug access

– Security aware debugging

• Trusted Execution Environment (TEE) supported

– Arm® TrustZone® based TEE

– Extensive firewall support for isolation

– Secure DMA path and interconnect

– Secure watchdog/timer/IPC

• Secure storage support

• On-the-fly encryption and authentication support

for OSPI interface

• Networking security support for data (payload)

encryption/authentication via packet based

hardware cryptographic engine

• Security coprocessor (DMSC) for key and

security management, with dedicated device level

interconnect for security software

SoC services:

• Device Management Security Controller (DMSC)

– Centralized SoC system controller

– Manages system services including initial boot,

security, functional safety and clock/reset/power

management

– Power management controller for active and

low power modes

– Communication with various processing units

over message manager

– Simplified interface for optimizing unused

peripherals

– Tracing and debugging capability

• Sixteen 32-bit general-purpose timers

• Two data movement and control Navigator

Subsystems (NAVSS)

– Ring Accelerator (RA)

– Unified DMA (UDMA)

– Up to 2 Timer Managers (TM) (1024 timers

each)

Multimedia:

• Display subsystem

– Two fully input-mapped overlay managers

associated with two display outputs

– One port MIPI® DPI parallel interface

– One port OLDI

• PowerVR® SGX544-MP1 3D Graphics Processing

Unit (GPU)

• One Camera Serial Interface-2 (MIPI CSI-2)

• One port video capture: BT.656/1120 (no

embedded sync)

High-speed interfaces:

• One Gigabit Ethernet (CPSW) interface supporting

– RMII (10/100) or RGMII (10/100/1000)

– IEEE1588 (2008 Annex D, Annex E, Annex F)

with 802.1AS PTP

– Audio/video bridging (P802.1Qav/D6.0)

– Energy-efficient Ethernet (802.3az)

– Jumbo frames (2024 bytes)

– Clause 45 MDIO PHY management

• Two PCI-Express® ( PCIe®) revision 3.1

subsystems

(2)

– Supports Gen2 (5.0GT/s) operation

– Two independent 1-lane, or a single 2-lane port

– Support for concurrent root-complex and end-

point operation

• USB 3.1 Dual-Role Device (DRD) subsystem

(2)

– One enhanced SuperSpeed Gen1 port

– One USB 2.0 port

– Each port independently configurable as USB

host, USB peripheral, or USB DRD

General connectivity:

• 6× Inter-Integrated Circuit ( I2C™) ports

• 5× configurable UART/IrDA/CIR modules

• Two simultaneous flash interfaces configured as

– Two OSPI flash interfaces

– or HyperBus™ and OSPI1 flash interface

• 2× 12-bit Analog-to-Digital Converters (ADC)

– Up to 4 Msamples/s

– Eight multiplexed analog inputs

• 8× Multichannel Serial Peripheral Interfaces

(MCSPI) controllers

– Two with internal connections

– Six with external interfaces

• General-Purpose I/O (GPIO) pins

Control interfaces:

• 6× Enhanced High-Resolution Pulse-Width

Modulator (EHRPWM) modules

• One Enhanced Capture (ECAP) module

• 3× Enhanced Quadrature Encoder Pulse (EQEP)

modules

AM6548, AM6528, AM6546, AM6526

SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021

www.ti.com

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Product Folder Links: AM6548 AM6528 AM6546 AM6526

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