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FDA803D-EHT 数据表(PDF) 57 Page - STMicroelectronics |
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FDA803D-EHT 数据表(HTML) 57 Page - STMicroelectronics |
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57 / 78 page ![]() DocID031487 Rev 2 57/78 FDA803D I2C bus interface 77 14 I2C bus interface Data transmission from microprocessor to the FDA803D and viceversa takes place through the 2 wires I2C bus interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected). When I2C bus is active any operating mode of the IC may be modified and the diagnostic may be controlled and results read back. The protocol used for the bus is depicted in Figure 69 and comprises: a start condition (S) a chip address byte (the LSB bit determines read/write transmission) a subaddress byte a sequence of data (N-bytes + acknowledge) a stop condition (P) Figure 69. I2C bus protocol description 1. The I2C addresses are: Address 1 = 1110000 Address 2 = 1110001 Address 3 = 1110010 Address 4 = 1110011 Address 5 = 1110100 Address 6 = 1110101 Address 7 = 1110110 Address 8 = 1110111 Description: – S = Start – R/W = '0' => Receive-Mode (Chip could be programmed by μP) – I = Auto increment; when 1, the address is automatically incremented for each byte transferred – X: not used – A = Acknowledge – P = Stop – MAX CLOCK SPEED 400kbit/sec |
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